Senior Principal Digital SoC Architect - Richardson, TX, United States
Originally posted 20 July 2026 by the employer.
About the role
As a Senior Principal Digital SoC Architect, you will lead the technical definition, microarchitecture, and execution strategy of mixed-signal Systems-on-Chip (SoCs). You will bridge the gap between high-level market requirements and silicon implementation across electric vehicles, ADAS, autonomous systems, and AI data centers.
What you'll do
- Lead the architectural definition and technical specifications of mixed-signal SoCs, defining CPU/DSP subsystems, bus fabrics, memory maps, power management schemes, and digital/analog interfaces. - Define and champion the digital IP roadmap, covering hardware accelerators, security blocks, and communication protocols, while driving global IP reuse strategies. - Develop architectural and transaction-level models to validate performance, latency, and power budgets early in the design cycle. - Serve as the technical bridge between Product Marketing, Analog Design, Digital Design, Physical Design, Verification (DV/MSDV), and Software/Systems teams for top-level integration. - Architect safety-critical features to ensure compliance with ISO 26262 automotive functional safety standards up to ASIL D and security protocols such as Evita/HSM. - Partner with Technology Development to select silicon process nodes (such as SG8) and packaging technologies to meet cost, thermal, and performance goals.
What you'll need
- B.S. or M.S. in Electrical or Computer Engineering (or Ph.D.) with 12+ years of experience in semiconductor digital design, including 5+ years acting as a lead SoC Architect. - Experience integrating embedded processors (ARM Cortex-M/R, RISC-V), network-on-chip (NoC) interconnects, and memory subsystems (SRAM, Flash, NVM). - Working knowledge of automotive and industrial protocols, including CAN-FD, LIN, SPI, I2C, I3C, Ethernet, and SENT. - In-depth knowledge of ISO 26262 functional safety architectures, including lockstep cores, ECC, BIST/LBIST, and safety diagnostics. - Expertise in multi-voltage domains, power gating, dynamic voltage frequency scaling (DVFS), and UPF-driven verification. - Proficiency in system modeling using SystemC or MATLAB/Simulink, alongside digital front-end design tools using Verilog and SystemVerilog.
Nice to have
- Direct experience with smart motor control, brushless DC (BLDC) algorithms, or advanced magnetic sensing systems. - Experience with hardware security modules (HSM) and cryptographic accelerators. - Experience with mixed-signal design flows (MSDV) and top-level chip integration.
Skills: SoC architecture, CPU/DSP subsystems, ISO 26262, power management, IP strategy, functional safety
This role has been open 91 days — well above the 81-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
470
|
Median days open
81 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Allegro MicroSystems | All employers we track in this specialty (470 roles · 66 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 470 |
| Open roles in the wider Digital Design & Verification family | 6 | 3224 · 116 employers |
| Median days open | 91 d | 81 d (+10 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: SoC architecture, CPU/DSP subsystems, ISO 26262, power management, IP strategy, functional safety
Who's hiring in this category
- Qualcomm · 73 open roles · median 90 d
- NVIDIA · 56 open roles · median 71 d
- Apple · 36 open roles · median 14 d
- AMD · 34 open roles · median 62 d
- Arm Holdings · 27 open roles · median 117 d
- Micron Technology · 22 open roles · median 109 d
How we counted: 470 open SoC/Chip Architecture (SOC Architecture) roles from 66 employers tracked in the SemiconductorJobs index, counted 20 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.