Manager, ASIC Chip - GPU - CA, Santa Clara, United States
$196,000 - $310,500 USD yearly
Originally posted 23 July 2026 by the employer.
About the role
Coordinate all aspects of GPU ASIC development from concept phase to mass-production for AI datacenter products.
What you'll do
- Coordinate all aspects of GPU ASIC development from concept phase through mass-production. - Engage in architectural definition, silicon process and package selection, performance modeling, power budgeting, RTL development, and test implementation. - Define and track project achievements and dependencies across IP development, software, emulation, integration, physical development, and VLSI teams. - Collaborate with packaging, system design, DFT, test engineering, test software, and chip logistics teams to support silicon bring-up. - Identify and mitigate key technical risks across the project lifecycle.
What you'll need
- BSEE (or MSEE / MSCE preferred) or equivalent experience. - Minimum of 10 overall years of industry experience with 5+ years of leadership in GPU or key sub-systems. - In-depth knowledge of SoC architectures, including CPU, GPU, and memory sub-systems. - Expertise in silicon process technology, yield analysis, and cost modeling. - Proficiency in front-end design flow, micro-architecture, unit partitioning, and pipelining. - Proficiency in design verification techniques, tools, and methodologies.
Nice to have
- Proven track record of implementing complex GPU ASIC projects. - Experience with AI and datacenter products. - Demonstrated ability to lead cross-functional teams.
Skills: GPU ASIC development, architectural definition, performance modeling, RTL development, SoC architectures
This role has been open 88 days — well above the 78-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
472
|
Median days open
78 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (472 roles · 65 employers) |
|---|---|---|
| Open roles in this specialty | 56 | 472 |
| Open roles in the wider Digital Design & Verification family | 231 | 3224 · 116 employers |
| Median days open | 70 d | 78 d (−8 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: GPU ASIC development, architectural definition, performance modeling, RTL development, SoC architectures
Who's hiring in this category
- Qualcomm · 73 open roles · median 89 d
- NVIDIA (this employer) · 56 open roles · median 70 d
- Apple · 36 open roles · median 13 d
- AMD · 34 open roles · median 61 d
- Arm Holdings · 27 open roles · median 116 d
- Micron Technology · 22 open roles · median 108 d
How we counted: 472 open SoC/Chip Architecture (SOC Architecture) roles from 65 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.