About the role
This role leads the architecture, design, and development of advanced semiconductor packaging solutions, including 2.5D/3D IC, System-in-Package (SiP), Flip Chip, and Wafer-Level Packaging. The position owns TSV reveal and C4 bumping process flows for microLED-based optical engine interconnect packaging.
What you'll do
- Lead the architecture, design, and development of 2.5D/3D IC, System-in-Package (SiP), Flip Chip, and Wafer-Level Packaging solutions.
- Lead development, characterization, and optimization of TSV reveal processes, including back grind, CMP, dielectric/barrier reveal etch, and thickness/uniformity control.
- Own C4 bumping process flows, including UBM deposition, solder bump plating or ball drop, reflow, and flux clean for flip-chip and 3D-IC applications.
- Develop and maintain process control plans (SPC), DOEs, and yield improvement roadmaps for optical engine packaging and bumping modules.
- Partner with integration engineering to co-optimize TSV reveal with downstream hybrid bonding, micro-bump, or RDL processes.
- Troubleshoot excursions using FA data, cross-sections, and metrology (CD-SEM, profilometry, XRF, AOI) to root-cause defects such as TSV protrusion variation, via reveal non-uniformity, bump voiding, or co-planarity issues.
- Support new product/technology introduction (NPI) from pathfinding through HVM transfer.
What you'll need
- MS or PhD in Materials Science, Electrical Engineering, Chemical Engineering, Mechanical Engineering, or a related field.
- 5+ years of hands-on experience in semiconductor packaging or wafer fab process engineering working with major OSATs (such as ASE, AMKOR, SPIL).
- Direct, hands-on experience with TSV reveal (grinding, CMP, dielectric reveal, thickness metrology) and C4 bumping (UBM, electroplating or solder ball attach, reflow).
- Strong understanding of 2.5D/3D packaging architectures (interposers, chiplets, HBM integration).
- Understanding of semiconductor device physics, packaging materials, and thermal/mechanical analysis.
- Experience with statistical process control (SPC), DOE methodology, and yield analysis.
- Familiarity with metrology and inspection tools relevant to bumping/TSV (CD-SEM, AFM, profilometers, X-ray, AOI/SEM defect review).
- Working knowledge of cleanroom fab operations and contamination control.
Nice to have
- Experience with copper pillar bumping, micro-bump, or hybrid bonding processes.
- Background in wafer thinning and temporary bonding/debonding for advanced node packaging.
- Exposure to reliability testing (thermal cycling, electromigration, HAST) for packaged parts.
- Experience supporting HVM ramp in an OSAT or IDM environment.
More semiconductor jobs: Process engineer jobs · Sunnyvale jobs
First seen in our index 7 days ago, well below the 45-day median for Process Integration roles.
Process Integration · Advanced Packaging
|
Open roles in category
96
|
Median days since first seen
45 d
|
Category median salary (all employers)
$171k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Avicena | All employers we track in this specialty (96 roles · 24 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 96 |
| Open roles in the wider Process, Fab & Equipment family | 11 | 10176 · 116 employers |
| Median days since first seen | 7 d | 45 d (+38 d vs this employer) |
| Median salary (USD postings) | n/a | $171k |
Who's hiring in this category
- Micron Technology · 19 open roles · median 47 d
- Intel Corporation · 11 open roles · median 120 d
- SkyWater Technology · 11 open roles · median 21 d
- Applied Materials · 10 open roles · median 55 d
- GlobalFoundries · 10 open roles · median 109 d
- Renesas Electronics · 5 open roles · median 57 d
How we counted: 96 open Process Integration (Advanced Packaging) roles from 24 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Process, Fab & Equipment family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.