Senior Engineer - Standard Cell Design - Hyderabad - Phoenix Aquila, India
Originally posted 21 July 2026 by the employer.
Join a team focused on standard cells for new DRAM products.
About the role
This role involves the design, characterization, and maintenance of standard cells for new DRAM products.
What you'll do
- Design and maintain standard cells for new DRAM products on new technology.
- Collaborate with the DTCO team to develop stdcells architecture for emerging technologies.
- Characterize and model Standard cells to provide timing/power models.
- Analyze the quality of characterized liberty models for performance, Power, and Functionality.
- Develop automation test bench/flow/tools to improve work efficiency and data analysis.
- Identify stdcells design & char pain points suitable for AI-based automation and deploy scalable solutions.
What you'll need
- Good understanding of CMOS circuit design.
- Good knowledge of CMOS device physics and layout.
- Experience in total stdcells flow from DTCO development/spec definition till lib release.
- Experience with RTL/GDS flow setup, block level timing analysis, ICC2.
- Experience with Finefet & planner.
- Experience in Skill, TCL, Perl, Python to do test bench automation and data analysis.
Nice to have
- Experience in any characterization tools (Siliconsmart/Liberate).
- Experience with Cadence Virtuoso.
- Experience in Primetime, Solido Analytics.
- Familiarity with analog/digital simulation tools (HSPICE, HSIM, VerilogHDL, FINESIM, Simvision).
- Previous work experience in DRAM memory related fields or analog blocks.
- Experience using AI-assisted tools to improve stdcells design & char productivity, with an emphasis on correctness, validation, and responsible use of enterprise-approved AI systems.
Skills: standard cells, DRAM products, CMOS circuit design, characterization, AI-based automation
This role has been open 75 days — slightly above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: standard cells, DRAM products, CMOS circuit design, characterization, AI-based automation
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.