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Microchip Technology

Senior Engineer II - Product - CA - San Jose - 3850 N. First St, United States

Microchip Technology CA - San Jose - 3850 N. First St, United States 8 months ago
Product Engineering & Quality

$70,304 - $163,000 USD yearly

Originally posted 12 March 2026 by the employer.

PolarFire FPGA and PolarFire SoC product qualification and reliability engineering.

About the role

As a Senior Engineer II - Product in the FPGA Business Unit's New Products Group (NPI), you will support the entire product lifecycle across silicon definition, design verification, test coverage, product qualification, and yield improvement. The role focuses on product reliability experiments and qualifications for PolarFire FPGA and PolarFire SoC product families.

What you'll do

- Provide hands-on support for product reliability, qualification designs, hardware development, and experimental test conditions. - Apply product-level knowledge for statistical, electrical, and physical root cause failure analysis pre- and post-qualification. - Support production test flows by defining test limits, analyzing test coverage, performing root cause yield analysis, and ensuring datasheet compliance. - Validate on-chip components including microprocessors, high-speed I/Os, eNVM, SRAM, PLLs, and analog I/Os. - Develop software for verifying and testing FPGA and SoC products across production and engineering environments. - Resolve release-to-manufacturing issues and implement corrective actions.

What you'll need

- Master's degree in Electrical Engineering or equivalent. - 6+ years of experience with semiconductor product qualifications and JEDEC standards. - 3+ years of knowledge of silicon reliability and process failure mechanisms. - 1+ years of knowledge of package reliability and assembly failure mechanisms. - 2+ years of hands-on experience with automation languages such as C, Python, Perl, Java, or Visual Basic. - Direct experience using ATE, bench, and wafer test systems.

Nice to have

- Understanding of RTL (VHDL or Verilog). - Ability to develop FPGA designs using EDA development tools and flows. - Knowledge of AECQ-100 or MIL-STD-883 qualification standards.

Skills: JEDEC, silicon reliability, product qualification, ATE, yield analysis

Market context

This role has been open 222 days — well above the 64-day median for Product Engineering roles.

Product Engineering · Silicon Validation

Open roles in category
41
Median days open
64 d
Median salary
$198k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Microchip Technology compares in Product Engineering hiring
Metric Microchip Technology All employers we track in this specialty (41 roles · 17 employers)
Open roles in this specialty 4 41
Open roles in the wider Silicon Validation & Test family 65 2229 · 112 employers
Median days open 96 d 64 d (+32 d vs this employer)
Median salary (USD postings) — $198k

Skills observed across this category: JEDEC, silicon reliability, product qualification, ATE, yield analysis

Who's hiring in this category

  • AMD · 9 open roles · median 67 d
  • NVIDIA · 5 open roles · median 39 d
  • Microchip Technology (this employer) · 4 open roles · median 96 d
  • Qualcomm · 4 open roles · median 63 d
  • onsemi · 3 open roles · median 138 d
  • Arm Holdings · 2 open roles · median 96 d

How we counted: 41 open Product Engineering (Silicon Validation) roles from 17 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.

Apply now
CA - San Jose - 3850 N. First St, United States
On-site
$70,304 - $163,000 USD yearly
8 months ago

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