Senior Engineer II - Physical Design - AZ - Chandler, United States
Originally posted 16 July 2026 by the employer.
About the role
The Senior Engineer II - Physical Design joins the DSPIC Physical Design team to execute microcontrollers and microcontroller-based SOC designs. The role focuses on hierarchical, low-power, mixed-signal microcontroller solutions using FLASH process technologies.
What you'll do
- Implement complex mixed-signal, low-power designs from new design exploration through netlist-to-GDSII flow and metal-only ECO delivery. - Conduct floorplan exploration, power domain and voltage area-based floor planning, and power grid planning and implementation. - Execute placement and optimization, clock tree synthesis, balancing, and post-route timing closure for chip- and block-level designs. - Perform timing and signal integrity analysis, power integrity analysis, and IR drop and electromigration (EM) signoff. - Run physical verification including DRC and LVS, and provide physical design support for test chip shuttles. - Collaborate with synthesis, DFT, IP teams, and CAD vendors to enhance physical design flows and ensure first-pass silicon success.
What you'll need
- Bachelor of Engineering or Master of Engineering in Electrical / Electronic Engineering or equivalent. - Minimum of 5 years of hands-on experience in physical design and related technical areas. - Advanced knowledge of place and route methodologies and low-power physical design flows. - Proficiency with EDA tools such as Innovus or Fusion Compiler, Calibre, Redhawk, Starrcxt, or equivalent. - Strong scripting skills in TCL, PERL, and Shell, along with working knowledge of Verilog and VHDL.
Skills: mixed signal, low power designs, floorplan, placement and optimization, GDSII
This role has been open 122 days — well above the 63-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
673
|
Median days open
63 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Microchip Technology | All employers we track in this specialty (673 roles · 79 employers) |
|---|---|---|
| Open roles in this specialty | 14 | 673 |
| Open roles in the wider Physical Implementation family | 28 | 1489 · 110 employers |
| Median days open | 75 d | 63 d (+12 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: mixed signal, low power designs, floorplan, placement and optimization, GDSII
Who's hiring in this category
- Qualcomm · 122 open roles · median 46 d
- AMD · 63 open roles · median 27 d
- Intel Corporation · 40 open roles · median 15 d
- NVIDIA · 38 open roles · median 68 d
- Synopsys · 37 open roles · median 37 d
- Broadcom · 34 open roles · median 102 d
How we counted: 673 open Physical Design (Physical Design) roles from 79 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.