Senior Director, Test & Product Engineering - Austin, United States
Originally posted 3 June 2026 by the employer. Relisted by the employer on 20 August 2026.
About the role
This role defines and executes a unified strategy across test and product engineering while leading global teams and establishing scalable processes for new product introduction, yield ramp, and sustaining operations. The focus spans power semiconductors including Si, SiC, GaN, modules, and power ICs across the full product lifecycle.
What you'll do
- Own the product lifecycle from silicon bring-up and qualification through high-volume manufacturing, driving yield ramps, managing excursions, and resolving yield issues across fab, assembly, and test. - Lead the development and deployment of wafer sort, final test, and characterization solutions while driving test time reduction, multisite efficiency, and ATE platform standardization. - Manage product KPIs, ECO/PCN change control processes, and partner with design teams on design-for-yield, parametric margining, and specification alignment. - Resolve yield excursions, test escapes, and customer returns in partnership with Quality and Reliability teams to align product performance, test limits, and reliability targets. - Collaborate with Operations and OSAT manufacturing partners to ensure production readiness, capacity alignment, and continuous improvement. - Manage budget, headcount, and capital planning while driving operational metrics across yield, cost, quality, and cycle time.
What you'll need
- Bachelor’s degree in Electrical Engineering or related field. - 15+ years of semiconductor experience across test and/or product engineering, including leadership of global teams. - Technical background in power semiconductors (Si, SiC, GaN, modules, or power ICs). - Proven track record in yield ramp, cost optimization, and high-volume manufacturing execution. - Deep understanding of ATE, characterization, and yield analysis across the full product lifecycle.
Nice to have
- Advanced degree in Electrical Engineering or a related field. - Experience with data center power architectures (AC-DC, DC-DC). - Familiarity with power module packaging, thermal behavior, and high-current test methods. - Experience with statistical yield analysis, reliability and qualification methodologies, test automation, and manufacturing data analytics.
This role has been open 141 days — well above the 36-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
564
|
Median days open
36 d
|
Median salary
$176k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (564 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 44 | 564 |
| Open roles in the wider Silicon Validation & Test family | 114 | 2240 · 112 employers |
| Median days open | 30 d | 36 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Who's hiring in this category
- Teradyne · 75 open roles · median 28 d
- Infineon Technologies · 46 open roles · median 40 d
- Renesas Electronics (this employer) · 44 open roles · median 30 d
- Qualcomm · 31 open roles · median 36 d
- Texas Instruments · 29 open roles · median 31 d
- Micron Technology · 28 open roles · median 40 d
How we counted: 564 open Silicon Test Engineering (DFT Test) roles from 78 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.