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Astera Labs

Senior Digital Design Engineer - San Jose, California, United States

Astera Labs San Jose, California, United States 7 days ago
Digital Design & SoC Architecture

Originally posted 28 September 2026 by the employer.

Focus on connectivity solutions integrating PCIe.

About the role

This role involves the development of micro-architecture and implementation of front-end circuit design for high performance network controllers.

What you'll do

  • Develop micro-architecture for digital designs
  • Implement front-end circuit designs, including RTL
  • Perform synthesis for digital designs
  • Integrate IP for high performance network controllers
  • Conduct silicon bring-up and debug

What you'll need

  • Bachelor's degree in Electrical Engineering
  • Knowledge of high-speed protocols like PCIe, Ualink, Esun, Ethernet
  • Proven front end design skill – architecture, RTL, simulations and synthesis
  • Experience with Synopsys and/or Cadence digital design tools/flows
  • Knowledge of design for test (DFT)
  • Familiarity with UVM based design verification

Nice to have

  • Scripting with Python or other equivalent programming languages
  • Development/support for PCIe or Ethernet Switch products
Market context

This role has been open 0 days — well below the 62-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
986
Median days open
62 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How Astera Labs compares in Digital/RTL Design hiring
Metric Astera Labs All employers we track in this specialty (986 roles · 101 employers)
Open roles in this specialty 25 986
Open roles in the wider Digital Design & Verification family 57 3112 · 115 employers
Median days open 19 d 62 d (−43 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm · 141 open roles · median 62 d
  • AMD · 68 open roles · median 65 d
  • Synopsys · 65 open roles · median 24 d
  • NXP Semiconductors · 54 open roles · median 72 d
  • NVIDIA · 47 open roles · median 53 d
  • Analog Devices · 46 open roles · median 37 d

How we counted: 986 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
San Jose, California, United States
On-site
7 days ago

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