Senior Digital Design Engineer - Chandler, AZ, United States
$150,000 - $200,000 USD yearly
Originally posted 19 August 2026 by the employer.
Join us to contribute to chiplet power delivery technology.
About the role
This role involves designing and implementing complex digital systems and SoC components, owning functional blocks from microarchitecture through RTL development, integration, and implementation.
What you'll do
- Develop microarchitecture for assigned digital blocks and subsystems
- Design, code, and maintain high-quality, synthesizable RTL
- Integrate RTL into larger subsystem and SoC environments
- Support lint, CDC/RDC, synthesis, and design quality checks
- Ensure designs meet functional, timing, power, and DFT requirements
- Support silicon bring-up, validation, and post-silicon debug activities
What you'll need
- 6+ years of digital IC design experience
- Hands-on RTL development experience using Verilog or SystemVerilog
- Experience designing digital blocks for complex SoCs or ASICs
- Solid understanding of RTL design and microarchitecture
- Knowledge of SoC integration and standard on-chip interfaces
- Familiarity with clocking, resets, CDC/RDC methodologies, synthesis, and physical implementation considerations
- Experience with timing constraints (SDC) and timing closure
- Experience with industry-standard EDA tools (Synopsys and/or Cadence)
Nice to have
- Experience with DFT methodologies including scan insertion and MBIST
- Experience with logic equivalence checking (LEC)
- Familiarity with static timing analysis (STA)
- Experience with UPF/CPF low-power methodologies
- Exposure to advanced semiconductor process nodes
- Experience supporting silicon bring-up and post-silicon debug
- Formal verification experience
This role has been open 57 days — below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1021
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | PowerLattice | All employers we track in this specialty (1021 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 1021 |
| Open roles in the wider Digital Design & Verification family | 2 | 3198 · 115 employers |
| Median days open | 57 d | 62 d (−5 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 140 open roles · median 62 d
- Synopsys · 85 open roles · median 30 d
- AMD · 71 open roles · median 36 d
- Analog Devices · 48 open roles · median 50 d
- NVIDIA · 46 open roles · median 64 d
- NXP Semiconductors · 41 open roles · median 85 d
How we counted: 1021 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.