Originally posted 26 August 2026 by the employer.
This role focuses on High-Bandwidth Memory (HBM) architectures and circuit blocks.
About the role
This role involves the design, simulation, and validation of High-Bandwidth Memory (HBM) architectures and circuit blocks.
What you'll do
- Design, optimize, and validate memory, logic, analog, or mixed-signal circuits used in HBM products, including PHY-adjacent or subsystem logic.
- Contribute to HBM architecture definition, block-level specifications, and design tradeoff analysis across performance, power, area, and reliability.
- Perform pre-layout and post-layout simulation, modeling, and analysis to ensure robust design margins.
- Support post-silicon bring-up, failure analysis, and design correlation.
- Work closely with layout engineers on floorplanning, placement, routing, and design rule compliance.
- Review parasitics, EM/IR, and reliability results; drive design or layout fixes as needed.
What you'll need
- Prior experience in HBM, DRAM, high-speed I/O, or memory-related designs.
- Familiarity with 3D-stacked architectures, TSVs, wide I/O interfaces, or PHY-adjacent logic.
- Understanding of DRAM array control and high speed circuit design.
- Experience in function verification and timing analysis with mixed signal design.
- Familiar with device reliability. Experienced in reliability mitigation technology and verification flow.
- Familiar with analog/digital simulation tools, i.e., HSPICE, VerilogHDL, Primesim.
- MS in Computer Engineering or related field.
- 3 years DRAM Design or Verification experience.
Skills: HBM, DRAM, high-speed I/O, 3D-stacked architectures, PHY-adjacent logic, mixed signal design
This role has been open 39 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: HBM, DRAM, high-speed I/O, 3D-stacked architectures, PHY-adjacent logic, mixed signal design
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.