$161,500 - $218,500 USD yearly
Originally posted 12 June 2026 by the employer.
About the role
Arm Holdings is hiring a Senior Design Engineer to integrate PCIe, DDR, and other IPs for SoCs. The position focuses on I/O subsystems, complex compute platforms, and micro-architecture specification development.
What you'll do
- Write micro-architecture specifications, develop RTL, resolve bugs, and run design checks. - Integrate subsystems for protocols such as PCIe, DDR, and other SoC IP blocks. - Collaborate with verification engineers to review test plans and debug build issues. - Partner with performance analysis teams to evaluate and improve system performance. - Work with the backend implementation team on floor planning, timing constraints, and timing closure. - Support project management on activities, execution plans, and delivery schedules.
What you'll need
- Bachelor's or Master’s degree in Computer Science, Electrical/Computer Engineering, or a related field. - 7+ years of experience designing complex compute subsystems or SoCs. - Strong knowledge of digital hardware design and Verilog HDL. - Experience developing and integrating subsystems for PCIe, DDR/LPDDR, HBM, UCIe, or Ethernet. - Experience with static design checks, including CDC, RDC, X-Propagation, and linting. - Experience with Perl, Python, or other scripting languages.
Nice to have
- Experience with ARM-based designs or ARM System Architectures. - Experience with SystemVerilog and verification methodologies such as UVM, OVM, or e. - Experience leading small teams or projects. - Knowledge of synthesis, static timing analysis, power management techniques, DFT, and physical implementation.
Skills: RTL, Verilog HDL, PCIe, DDR, SoC
This role has been open 120 days — well above the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1070
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arm Holdings | All employers we track in this specialty (1070 roles · 105 employers) |
|---|---|---|
| Open roles in this specialty | 23 | 1070 |
| Open roles in the wider Digital Design & Verification family | 104 | 3298 · 115 employers |
| Median days open | 108 d | 62 d (+46 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: RTL, Verilog HDL, PCIe, DDR, SoC
Who's hiring in this category
- Qualcomm · 153 open roles · median 58 d
- Synopsys · 87 open roles · median 35 d
- AMD · 76 open roles · median 40 d
- Analog Devices · 49 open roles · median 51 d
- NXP Semiconductors · 42 open roles · median 90 d
- NVIDIA · 41 open roles · median 62 d
How we counted: 1070 open Digital/RTL Design (RTL Design) roles from 105 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.