ASIC Design Engineer, Senior - Austin RiverSouth, United States
Originally posted 23 May 2026 by the employer.
About the role
As a Senior ASIC Design Engineer, you will develop sensor circuits used in scribe-line applications across analog and digital design, verification, custom layout, and design automation.
What you'll do
- Design analog and mixed-signal circuit blocks for scribe-line sensor applications. - Support digital design for sensor control, integration, and readout functions. - Develop and run analog verification flows, including simulation setup, corner analysis, and results review. - Develop and execute digital verification strategies to ensure functional correctness and integration quality. - Build and maintain EDA scripting and automation to improve design and verification efficiency. - Drive or support custom layout implementation with attention to matching, parasitics, reliability, and manufacturability. - Analyze simulation and silicon data using Python and pandas to identify trends, debug issues, and guide design improvements.
What you'll need
- BS, MS, or PhD in Electrical Engineering or a related field. - B.S. with 8+ years or M.S. with 5+ years in related industry roles. - Strong background in analog design and experience with analog verification. - Experience with digital design and digital verification. - Experience with custom layout. - Strong experience with EDA scripting and automation. - Strong Python skills for data analysis, including pandas.
Nice to have
- Mixed-signal or sensor-circuit development. - Silicon characterization and correlation of measured data to simulation. - Workflow improvement through scripting, automation, and data analysis. - Debugging complex circuit and verification issues in advanced development flows.
Skills: VLSI test chips, Python EDA workflows, top-level chip layout, pre-silicon verification, analog block design
This role has been open 122 days — well above the 63-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1078
|
Median days open
63 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tokyo Electron | All employers we track in this specialty (1078 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 1078 |
| Open roles in the wider Digital Design & Verification family | 1 | 3298 · 115 employers |
| Median days open | 122 d | 63 d (+59 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: VLSI test chips, Python EDA workflows, top-level chip layout, pre-silicon verification, analog block design
Who's hiring in this category
- Qualcomm · 157 open roles · median 59 d
- Synopsys · 88 open roles · median 36 d
- AMD · 76 open roles · median 41 d
- Analog Devices · 49 open roles · median 52 d
- NXP Semiconductors · 42 open roles · median 91 d
- NVIDIA · 40 open roles · median 63 d
How we counted: 1078 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.