Senior Application Engineer – DDR5 Power Management & PMIC - San Jose, United States
$120,000 - $145,000 USD yearly
Originally posted 19 October 2026 by the employer.
About the role
As a Senior Application Engineer focused on DDR5 solutions, you will validate, implement, and optimize DDR5 memory systems, specifically focusing on digital and power efficiency. You will support product validation, system-level analysis, tool development, and direct customer interactions for power modules and PMICs.
What you'll do
- Execute bench validation and collect data on new products within power modules for DDR5 memory and memory controllers to ensure compliance with industry standards and customer requirements. - Conduct system-level analysis across DDR5 modules to identify performance traits and develop strategies to improve power efficiency. - Develop and maintain bench automation software, simulation models, and tools using LabVIEW, Python, or similar languages to evaluate DDR5 power consumption across chip, board, and system levels. - Provide direct technical customer support for DDR5 power-related issues during integration and product development phases. - Collaborate with cross-functional design, product, test, and packaging teams to ensure DDR5 solutions fulfill all performance and specification criteria. - Author technical documentation, including specifications, datasheets, power analysis reports, validation reports, and application notes.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering or a related field. - 4+ years of experience in power management, memory system design, or related fields. - Hands-on experience with bench validation of analog, digital, and power management devices, including PMICs, SPD Hub, I3C switches, and temperature sensors. - Technical understanding of analog and mixed-signal circuits, including amplifiers, temperature sensors, ADC, DAC, and voltage regulators. - Bench automation experience using LabVIEW, Python, or similar programming languages. - Direct experience supporting customers with technical design issues, application-level debug, and developing technical documentation such as datasheets and application notes.
Nice to have
- Master's or Ph.D. in Electrical Engineering or a related field. - 3+ years of focus on DDR5 or similar high-speed memory technologies. - Familiarity with DDR5 JEDEC standards and protocols. - Expertise in power modeling and simulation tools. - Expertise in hardware design tools.
Skills: DDR5, power management, PMICs, customer support, bench validation
This role has been open 0 days — well below the 69-day median for Applications FAE roles.
Applications FAE · Power Management
|
Open roles in category
205
|
Median days open
69 d
|
Median salary
$154k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (205 roles · 25 employers) |
|---|---|---|
| Open roles in this specialty | 19 | 205 |
| Median days open | 23 d | 69 d (−46 d vs this employer) |
| Median salary (USD postings) | — | $154k |
Skills observed across this category: DDR5, power management, PMICs, customer support, bench validation
Who's hiring in this category
- Monolithic Power Systems · 52 open roles · median 118 d
- Infineon Technologies · 33 open roles · median 73 d
- Texas Instruments · 26 open roles · median 34 d
- Renesas Electronics (this employer) · 20 open roles · median 21 d
- Analog Devices · 19 open roles · median 46 d
- Nexperia · 11 open roles · median 62 d
How we counted: 205 open Applications FAE (Power Management) roles from 25 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.
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