RTL Lead - Santa Clara, CA, United States
$200,000 - $500,000 USD yearly
Originally posted 15 July 2026 by the employer.
Lead RTL development for Velaura’s Physical AI SoC.
About the role
This role involves driving the implementation of Velaura’s Physical AI SoC, combining architectural influence with hands-on technical leadership.
What you'll do
- Lead RTL development across key portions of the Velaura SoC.
- Collaborate with architects to translate system requirements into robust microarchitectures.
- Drive hardware/software co-design across AI workloads, memory systems, runtime software, and system architecture.
- Drive design decisions across compute engines, memory subsystems, interconnect, control logic, and system infrastructure.
- Develop high-quality, power-efficient, and scalable RTL implementations.
- Mentor and develop other RTL engineers.
What you'll need
- Strong RTL design experience in complex SoCs, CPUs, GPUs, AI accelerators, networking devices, or related systems.
- Deep understanding of digital design fundamentals and microarchitecture.
- Experience with Verilog/SystemVerilog and modern RTL development methodologies.
- Familiarity with memory systems, interconnect fabrics, cache hierarchies, and system-level data movement.
- Experience balancing performance, power, area, and design complexity.
- Proven ability to drive complex technical projects from concept through silicon bring-up.
Nice to have
- Experience with AI accelerators, machine learning hardware, or edge AI platforms.
- Experience with robotics, autonomous systems, automotive, aerospace, or other real-time computing environments.
- Knowledge of low-power design techniques and power management architectures.
This role has been open 84 days — well above the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1036
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Velaura AI | All employers we track in this specialty (1036 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 10 | 1036 |
| Open roles in the wider Digital Design & Verification family | 26 | 3201 · 115 employers |
| Median days open | 45 d | 61 d (−16 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 140 open roles · median 65 d
- Synopsys · 86 open roles · median 33 d
- AMD · 71 open roles · median 39 d
- Analog Devices · 47 open roles · median 51 d
- NVIDIA · 42 open roles · median 61 d
- NXP Semiconductors · 42 open roles · median 87 d
How we counted: 1036 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.