Skip to main content
Broadcom

RTL integration Engineer - USA-CA San Jose Innovation Drive, United States

Broadcom USA-CA San Jose Innovation Drive, United States Full-time 3 months ago
Digital Design & SoC Architecture

$143,800 USD yearly

Originally posted 31 July 2026 by the employer.

About the role

The candidate will perform IP integration and IP test/debug mode verification at the SoC level. This role involves creating RTL designs and performing linting, CDC, and RDC analysis.

What you'll do

  • Perform IP integration and IP test/debug mode verification at the SoC level.
  • Create RTL designs and perform linting.
  • Execute CDC and RDC analysis for both RTL and gates.
  • Handle synthesis, palladium modeling, and STA support.
  • Debug failures effectively in zero-delay and SDF simulations.

What you'll need

  • Extensive knowledge of implementation, synthesis, and timing issues.
  • Strong understanding of UVM and SystemVerilog.
  • Deep familiarity with zero-delay and SDF simulations.
  • Proven experience in gate-level simulation (GLS).
  • Familiarity with Clock Domain Crossing (CDC) analysis for both RTL and gate-level designs.
  • Ability to work independently with minimal supervision.

Nice to have

  • Highly desirable experience with simulation tools such as NCSim and VCS.
Market context

This role has been open 79 days — well above the 60-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1037
Median days open
60 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How Broadcom compares in Digital/RTL Design hiring
Metric Broadcom All employers we track in this specialty (1037 roles · 103 employers)
Open roles in this specialty 13 1037
Open roles in the wider Digital Design & Verification family 50 3201 · 115 employers
Median days open 88 d 60 d (+28 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm · 140 open roles · median 64 d
  • Synopsys · 86 open roles · median 32 d
  • AMD · 71 open roles · median 38 d
  • Analog Devices · 47 open roles · median 50 d
  • NVIDIA · 44 open roles · median 60 d
  • NXP Semiconductors · 42 open roles · median 86 d

How we counted: 1037 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
USA-CA San Jose Innovation Drive, United States
On-site
Full-time
$143,800 USD yearly
3 months ago

Share this job