RTL Design Engineer - Palo Alto
$160,000 - $240,000 USD yearly
Originally posted 20 October 2026 by the employer.
About the role
This role is responsible for designing, implementing, and delivering RTL for complex digital systems, translating architectural specifications into scalable microarchitectures and production-ready RTL with attention to performance, power, and area.
What you'll do
- Design and implement RTL for complex digital subsystems using Verilog/SystemVerilog. - Translate architectural specifications into clean, efficient, and scalable microarchitectures. - Collaborate with architecture, verification, and physical design teams to ensure design correctness and closure. - Perform linting, CDC analysis, and ensure synthesis readiness of designs. - Support integration and debug of RTL in simulation and early silicon environments. - Assist in timing closure and support backend teams.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. - 5+ years of experience in RTL design. - Hands-on experience with Verilog/SystemVerilog and synchronous digital design principles. - Experience with simulation and debug tools, including VCS, Questa, Verdi, or DVE. - Familiarity with synthesis, timing, and physical design constraints.
Nice to have
- Experience designing high-performance systems such as AI/ML accelerators, networking, or SoCs. - Familiarity with low-power design techniques including clock gating and power gating. - Exposure to DFT concepts and design-for-test considerations. - Experience with scripting in Python, Tcl, or similar languages. - Experience working in advanced semiconductor process nodes. - Experience using AI coding agents (e.g., Claude Code, Cursor, Copilot) in RTL workflows.
This role has been open 7 days — well below the 66-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1081
|
Median days open
66 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Delos Data | All employers we track in this specialty (1081 roles · 104 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 1081 |
| Open roles in the wider Digital Design & Verification family | 3 | 3359 · 116 employers |
| Median days open | 7 d | 66 d (−59 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 158 open roles · median 63 d
- Synopsys · 86 open roles · median 40 d
- AMD · 77 open roles · median 45 d
- Analog Devices · 49 open roles · median 56 d
- NXP Semiconductors · 44 open roles · median 100 d
- NVIDIA · 37 open roles · median 52 d
How we counted: 1081 open Digital/RTL Design (RTL Design) roles from 104 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.