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Synopsys

RTL Design Engineer

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Boxborough, Massachusetts, United States 17 days ago
Digital Design & SoC Architecture

Originally posted 29 September 2026 by the employer.

About the role

This role involves the design and development of novel transceiver architectures and sub-block specifications, particularly for Memory, SerDes, and D2D. The scope includes driving revolutionary improvements in power, area, and performance targets.

What you'll do

  • Review UCIe and other D2D standards to develop novel transceiver architectures.
  • Investigate and develop circuit architectures to address architectural bottlenecks.
  • Collaborate across teams to streamline design and verification strategies.
  • Oversee PHY level physical layout to minimize parasitic effects.
  • Present and review simulation data internally and externally.
  • Document design features, test plans, and consult on D2D IP product electrical characterization.

What you'll need

  • PhD with 8+ years, or MSc with 10+ years of practical analog IC design experience.
  • Experience with FinFET technologies and transistor-level circuit design.
  • Extensive design experience with Memory, SerDes, and D2D sub-circuits, including receive equalizers, DAC-based transmitters, and high-speed clocking circuits.
  • Knowledge of ESD issues, custom digital design, and analog/digital interactions.
  • Proficiency with tools for schematic entry, physical layout, design verification, and SPICE simulators.
  • Proficiency with scripting languages like TCL, Perl, C, Python, and MATLAB.
Market context

This role has been open 15 days — well below the 62-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1021
Median days open
62 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How Synopsys compares in Digital/RTL Design hiring
Metric Synopsys All employers we track in this specialty (1021 roles · 103 employers)
Open roles in this specialty 87 1021
Open roles in the wider Digital Design & Verification family 172 3204 · 115 employers
Median days open 30 d 62 d (−32 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm · 140 open roles · median 62 d
  • Synopsys (this employer) · 85 open roles · median 30 d
  • AMD · 71 open roles · median 36 d
  • Analog Devices · 48 open roles · median 50 d
  • NVIDIA · 46 open roles · median 64 d
  • NXP Semiconductors · 41 open roles · median 85 d

How we counted: 1021 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Synopsys

Synopsys

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img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Boxborough, Massachusetts, United States
On-site
17 days ago

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