R&D Engineering, Sr Engineer
Originally posted 21 September 2026 by the employer.
Design and optimize embedded memory circuits including SRAM, ROM, and Register File blocks.
About the role
This role involves designing and optimizing embedded memory circuits, including SRAM, ROM, and Register File blocks. You will lead bitcell development from concept through characterization and ensure design intent is maintained through physical implementation.
What you'll do
- Design and optimize embedded memory circuits including SRAM, ROM, and Register File blocks for advanced process nodes.
- Lead bitcell development from concept through characterization, including transistor-level simulation, corner analysis, and reliability validation.
- Supervise and collaborate with layout engineers to ensure design intent is maintained through physical implementation.
- Work with CAD and compiler teams to integrate memory designs into automated generation flows and verification environments.
- Drive yield and performance improvements by analyzing silicon data, identifying failure modes, and iterating on design or test methodologies.
- Mentor junior engineers on circuit design techniques, simulation best practices, and design-for-manufacturability principles.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related technical discipline.
- 2+ years of hands-on experience in embedded CMOS memory design, with a focus on SRAM, ROM, or Register File development.
- Deep expertise in SRAM bitcell design, including read/write stability analysis, leakage optimization, and statistical variation modeling.
- Proficiency with circuit simulation tools such as HSPICE or Spectre, and layout tools for design review and verification.
- Strong scripting skills in C-Shell and Perl for automation and data analysis.
- Fluency in English and Vietnamese for technical communication and collaboration across global teams.
Nice to have
- Experience with C++ or JavaScript is a plus.
Skills: embedded memory, SRAM, ROM, bitcell design, circuit simulation
This role has been open 12 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 27 | 287 |
| Median days open | 49 d | 69 d (−20 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: embedded memory, SRAM, ROM, bitcell design, circuit simulation
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys (this employer) · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.