$132,800 - $199,200 USD yearly
Originally posted 13 October 2026 by the employer.
About the role
The Program Manager leads Central Hardware System (CHS) execution on chipset programs from early planning through design and NPI in San Diego. The role represents CHS in SoC program meetings, managing schedules, headcount, NRE, risks, change requests, and tape-out checklists.
What you'll do
- Own schedule management for CHS programs by building and maintaining the integrated schedule, managing cross-team dependencies, and tracking the critical path.
- Assess the downstream impact on CHS when partner-team schedules or requirements change, proposing recovery plans, options, and trade-offs.
- Plan and track headcount (HC) and non-recurring engineering (NRE) against plan at each milestone, collaborating with Finance on forecasts and spend.
- Maintain the risk and issue register, score program risks, and define mitigation and contingency plans to closure.
- Drive tape-out checklist (TOCL) management by tracking checklist items and sign-offs with engineering leads ahead of each tape-out.
- Lead chipset core meetings and use automation tools such as JIRA, Power BI, Power Automate, and Microsoft 365 Copilot to track program health.
What you'll need
- Bachelor's degree in Engineering, Computer Science, or related field.
- 2+ years of Program Management or related work experience (advanced degrees can substitute up to two years).
Nice to have
- Bachelor's or Master's degree in Electrical, Electronics, Computer, Mechanical, Materials, or related engineering discipline.
- Direct experience in semiconductor development or manufacturing.
- Working knowledge of the SoC and silicon product lifecycle, from architecture and tape-out through bring-up, qualification, and customer sampling.
- Understanding of IC package design and development, including substrate design, tape-out, and assembly.
- Package engineering, SI/PI, thermal, or test engineering experience.
- Hands-on experience with project management and dashboard tools such as MS Project, JIRA, Power BI, Power Automate, Splunk, or ThoughtSpot.
- PMP certification or equivalent.
Skills: program management, SoC lifecycle, tape-out checklist, JIRA, schedule management
More semiconductor jobs: Qualcomm jobs · San Diego jobs
First seen in our index 30 days ago, well below the 53-day median for Technical Program Management roles.
Technical Program Management · SOC Architecture
|
Open roles in category
160
|
Median days since first seen
53 d
|
Category median salary (all employers)
$220k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (160 roles · 49 employers) |
|---|---|---|
| Open roles in this specialty | 24 | 160 |
| Median days since first seen | 64 d | 53 d (−11 d vs this employer) |
| Median salary (USD postings) | n/a | $220k |
Skills observed across this category: program management, SoC lifecycle, tape-out checklist, JIRA, schedule management
Who's hiring in this category
- NVIDIA · 24 open roles · median 58 d
- Qualcomm (this employer) · 21 open roles · median 63 d
- AMD · 20 open roles · median 33 d
- Synopsys · 13 open roles · median 51 d
- NXP Semiconductors · 7 open roles · median 52 d
- Arm Holdings · 6 open roles · median 14 d
How we counted: 160 open Technical Program Management (SOC Architecture) roles from 49 employers tracked in the SemiconductorJobs index, counted 12 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Days are counted from when our index first saw each posting, not from the employer's original posting date.