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Marvell Technology

Process Engineer Intern, MS - Summer 2027 - Santa Clara, CA, United States

Marvell Technology Santa Clara, CA, United States Internship 26 days ago
Process & Device Engineering

$37 - $73 USD yearly

Originally posted 9 September 2026 by the employer — open 1 day.

Focus on 2.5D/3D chip-on-wafer development and co-packaged optics.

About the role

This role supports Marvell's AI Products team with assembly and packaging technologies. This involves 2.5D/3D chip-on-wafer development and co-packaged optics, which are foundational for Marvell's AI silicon performance, density, and bandwidth.

What you'll do

  • Support process development activities for 2.5D/3D chip-on-wafer assembly and co-packaged optics.
  • Track and analyze data related to packaging builds to identify trends and risks during NPI phase.
  • Document risks and mitigation plans as products mature toward high-volume manufacturing readiness.
  • Participate in partner and internal team meetings to gain exposure to design-for-manufacturing, process development, reliability, and cost-tradeoff discussions.

What you'll need

  • Currently enrolled in a Master's Degree in Materials Science, Chemical Engineering, Mechanical Engineering, Chemistry, Physics, or a related field with an expected graduation date of Fall 2027 – Summer 2028.
  • Coursework or academic project experience related to semiconductor processing, materials science, or packaging/assembly technologies.
  • Familiarity with data analysis and organization using tools such as Excel, JMP, or Minitab.
  • Exposure to advanced packaging concepts such as 2.5D/3D chip-on-wafer assembly or co-packaged optics through coursework, research, or internship experience.
  • Familiarity with programming or scripting languages such as Python for data analysis.
  • Prior internship or research experience in a semiconductor, manufacturing, or process engineering setting.

Nice to have

  • Basic understanding of reliability testing or failure analysis concepts.

Skills: process development, 2.5D/3D chip-on-wafer assembly, co-packaged optics, foundry, OSAT, NPI

Market context

This role has been open 1 day — well below the 79-day median for Process Engineering roles.

Process Engineering · Semiconductor Process

Open roles in category
1020
Median days open
79 d
Median salary
$148k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Marvell Technology compares in Process Engineering hiring
Metric Marvell Technology All employers we track in this specialty (1020 roles · 58 employers)
Open roles in this specialty 1 1020
Open roles in the wider Process, Fab & Equipment family 10 9211 · 109 employers
Median days open 1 d 79 d (−78 d vs this employer)
Median salary (USD postings) — $148k

Skills observed across this category: process development, 2.5D/3D chip-on-wafer assembly, co-packaged optics, foundry, OSAT, NPI

Who's hiring in this category

  • Micron Technology · 350 open roles · median 127 d
  • Applied Materials · 89 open roles · median 127 d
  • GlobalFoundries · 73 open roles · median 79 d
  • STMicroelectronics · 48 open roles · median 62 d
  • Texas Instruments · 46 open roles · median 24 d
  • Infineon Technologies · 35 open roles · median 52 d

How we counted: 1020 open Process Engineering (Semiconductor Process) roles from 58 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.

Apply now
Santa Clara, CA, United States
On-site
Internship
$37 - $73 USD yearly
26 days ago

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