Process Development Engineer - Photolithography - Richardson, TX, United States
Originally posted 17 July 2026 by the employer.
Support photolithography processes and tools across 1x, i-line, and ebeam platforms at Qorvo's wafer fabrication facility.
About the role
This role is responsible for developing, optimizing, and sustaining lithography processes used for device fabrication at Qorvo’s semiconductor fabrication facility. The position supports photolithography processes and tools across 1x, i-line, and ebeam toolsets, including resist coat, expose, develop, and associated metrology.
What you'll do
- Support photolithography processes and tools for resist coat, expose, develop, and associated metrology across 1x, i-line, and ebeam toolsets. - Qualify, optimize, match, and troubleshoot ASML steppers/scanners and TEL track systems. - Partner with Process Engineering, Equipment Engineering, Manufacturing, Quality, Integration, and R&D to maintain process stability and improve product yield. - Execute Design of Experiments (DOE), root-cause analysis, and process control initiatives to enhance overlay, defectivity, and critical dimension control. - Analyze large manufacturing datasets using tools like SQL, Oracle, Spotfire, Access, or JMP to track process trends and resolve manufacturing issues. - Work standard Monday–Friday 8:00 AM–5:00 PM hours with significant time on-site in a cleanroom environment.
What you'll need
- BS in Engineering, Materials, Statistics, or physical sciences (or equivalent) with 5+ years of wafer fab semiconductor photolithography process engineering experience; or an MS with 3+ years; or a PhD with 0+ years. - Hands-on experience with ASML steppers/scanners and TEL track systems, covering process qualification, optimization, matching, and troubleshooting. - Demonstrated background in wafer fab process development, process control, DOE execution, yield improvement, and root-cause analysis. - Experience managing overlay, defectivity, critical dimension control, and overall lithography process performance. - Working knowledge of manufacturing data analysis tools such as SQL, Oracle, Spotfire, Access, or JMP. - Ability to spend significant time standing and working inside a cleanroom environment.
Nice to have
- Master's or PhD degree in Engineering, Materials, Statistics, or physical sciences. - Experience with data automation, scripting, and advanced analytics tools such as Databricks, Python, JMP Scripting Language (JSL), R, or MATLAB.
Skills: flip chip attach, die attach, SMT, NPI, process improvement, product yield
This role has been open 183 days — well above the 60-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
300
|
Median days open
60 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (300 roles · 59 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 300 |
| Open roles in the wider Process, Fab & Equipment family | 64 | 10039 · 106 employers |
| Median days open | 119 d | 60 d (+59 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: flip chip attach, die attach, SMT, NPI, process improvement, product yield
Who's hiring in this category
- KLA Corporation · 42 open roles · median 136 d
- Micron Technology · 40 open roles · median 42 d
- Renesas Electronics · 21 open roles · median 46 d
- Intel Corporation · 20 open roles · median 28 d
- GlobalFoundries · 14 open roles · median 68 d
- Lumilens · 13 open roles · median 79 d
How we counted: 300 open Packaging Engineering (Advanced Packaging) roles from 59 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.