Originally posted 7 October 2026 by the employer.
About the role
The Principal Validation Architect defines the validation strategy, methodologies, automation frameworks, and debug capabilities across GPU, SoC, and data center platforms. The role drives design-for-validation requirements and scalable validation solutions for AI, ML, and HPC accelerator products.
What you'll do
- Define and evolve validation strategies for AI, ML, and HPC accelerators, establishing scalable methodologies, coverage models, and validation frameworks. - Influence observability, controllability, debuggability, emulation, and automation capabilities across the product lifecycle to enable efficient validation and root-cause analysis. - Provide architectural leadership for silicon and platform challenges involving coherency, memory subsystems, power management, security, PCIe, and HW/SW interactions. - Partner with silicon architects to develop validation approaches for advanced GPU architectures, HBM memory systems, coherent interconnects, and large-scale AI infrastructure. - Direct the adoption of AI-assisted validation workflows, at-scale validation environments, and data-driven quality methodologies.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline. - Deep understanding of modern GPU, SoC, and server platform architectures, including post-silicon bring-up, validation, and system-level debug. - Experience with AI/ML accelerator or large-scale data center platform validation. - Experience developing validation architectures, methodologies, test strategies, automation frameworks, and infrastructure for complex semiconductor products. - Hands-on expertise in silicon and system-level debug across hardware and software domains. - Proficiency in programming and scripting languages including C/C++ and Python, with working knowledge of Linux and Windows server environments.
Nice to have
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
Skills: Principal Validation Architect, Data Center GPU, silicon bring-up, system-level debug, AI/ML accelerator
This role has been open 12 days — well below the 44-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
411
|
Median days open
44 d
|
Median salary
$172k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (411 roles · 61 employers) |
|---|---|---|
| Open roles in this specialty | 58 | 411 |
| Open roles in the wider Silicon Validation & Test family | 148 | 2227 · 113 employers |
| Median days open | 46 d | 44 d (+2 d vs this employer) |
| Median salary (USD postings) | — | $172k |
Skills observed across this category: Principal Validation Architect, Data Center GPU, silicon bring-up, system-level debug, AI/ML accelerator
Who's hiring in this category
- AMD (this employer) · 58 open roles · median 45 d
- Micron Technology · 39 open roles · median 41 d
- Qualcomm · 36 open roles · median 30 d
- NVIDIA · 26 open roles · median 25 d
- Microchip Technology · 22 open roles · median 70 d
- Graphcore · 20 open roles · median 123 d
How we counted: 411 open Post-Silicon Validation (Silicon Validation) roles from 61 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.