Principal Test Engineer, Test Architecture
Originally posted 29 October 2026 by the employer.
About the role
This role defines and drives semiconductor test methodology, design-for-test strategy, and test infrastructure for Renesas' Analog and Mixed-Signal division.
What you'll do
- Define and drive test architecture, methodology, and test solutions for analog and mixed-signal semiconductor products.
- Partner with IC design, product engineering, and test engineering teams to establish design-for-test (DFT) requirements and optimize product testability.
- Architect and optimize mixed-signal test hardware and software solutions to improve test quality, throughput, cost, and manufacturability across wafer sort and final test.
- Evaluate and influence tester roadmaps, test methodologies, and process improvements across the organization.
- Provide technical leadership and mentorship on test strategies, best practices, and problem-solving for complex semiconductor products.
What you'll need
- BS or MS in Electrical Engineering, Physics, or a related technical discipline with 10+ years of experience in semiconductor test engineering or a closely related field.
- Extensive Automatic Test Equipment (ATE) development experience with a track record of developing production test solutions on platforms such as Advantest 93K, ETS, Teradyne FLEX, Diamondx, LTX, SPEA, or similar systems.
- Experience designing test hardware and software for mixed-signal test solutions across both wafer sort and final test.
- Experience across new product introduction stages, including customer samples, qualification, characterization, and production test systems.
- Experience testing analog, mixed-signal, data converter, power management, and related semiconductor devices, alongside familiarity with digital interfaces and memory technologies.
- Thorough understanding of electrical engineering principles.
Nice to have
- Experience with analog or mixed-signal IC design and related development tools.
More semiconductor jobs: Renesas Electronics jobs · Test engineer jobs
This role has been open 0 days — well below the 36-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
602
|
Median days open
36 d
|
Category median salary (all employers)
$175k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (602 roles · 81 employers) |
|---|---|---|
| Open roles in this specialty | 50 | 602 |
| Open roles in the wider Silicon Validation & Test family | 113 | 2314 · 112 employers |
| Median days open | 26 d | 36 d (−10 d vs this employer) |
| Median salary (USD postings) | — | $175k |
Who's hiring in this category
- Teradyne · 77 open roles · median 32 d
- Renesas Electronics (this employer) · 48 open roles · median 30 d
- Infineon Technologies · 46 open roles · median 38 d
- Qualcomm · 32 open roles · median 41 d
- Texas Instruments · 31 open roles · median 36 d
- Micron Technology · 28 open roles · median 45 d
How we counted: 602 open Silicon Test Engineering (DFT Test) roles from 81 employers tracked in the SemiconductorJobs index, counted 29 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.