Principal SoC Verification Engineer - Austin (Oakhill, Office), United States
Originally posted 23 October 2026 by the employer.
About the role
This role involves end-to-end ownership of verification planning, testbench development, execution, debug, and sign-off for automotive SoC platforms used in safety-critical applications.
What you'll do
- Develop and execute SoC verification plans and strategies. - Build and maintain SystemVerilog/UVM based verification environments. - Verify complex SoC features including ARM-based subsystems, interconnects (AXI/ACE/CHI), DDR, PCIe, Ethernet, Security, Boot, low power, clock/reset architectures, and functional safety mechanisms (ISO 26262). - Drive functional, code, and assertion coverage closure. - Debug RTL, testbench, and system-level issues across simulation and post-silicon environments. - Collaborate with Architecture, Design, Firmware, Validation, and Safety teams to resolve issues.
What you'll need
- Bachelor's or Master's degree in EE, CE, CS, or related field. - Experience in SoC/IP verification. - Expertise in SystemVerilog, UVM, and SVA. - Hands-on experience with functional and code coverage closure. - Proficiency with simulation and debug tools including VCS, Xcelium, and Verdi. - Experience with ARM-based SoCs and industry-standard protocols including AXI, PCIe, DDR, and Ethernet.
Nice to have
- Automotive SoC experience. - Knowledge of ISO 26262 Functional Safety. - Experience with Low Power (UPF), Formal Verification, GLS, and Emulation. - Experience leading technical initiatives and mentoring engineers.
Skills: SystemVerilog, UVM, SVA, SoC verification, coverage closure
This role has been open 0 days — well below the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1241
|
Median days open
65 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NXP Semiconductors | All employers we track in this specialty (1241 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 49 | 1241 |
| Open roles in the wider Digital Design & Verification family | 135 | 3322 · 115 employers |
| Median days open | 92 d | 65 d (+27 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: SystemVerilog, UVM, SVA, SoC verification, coverage closure
Who's hiring in this category
- Qualcomm · 115 open roles · median 42 d
- AMD · 94 open roles · median 52 d
- NVIDIA · 85 open roles · median 64 d
- Synopsys · 66 open roles · median 38 d
- SiFive · 55 open roles · median 80 d
- Cadence Design Systems · 52 open roles · median 122 d
How we counted: 1241 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.