Principal Scientist - Tin Management Architect - San Diego, CA, United States
$171,200 - $235,400 USD yearly
Originally posted 2 September 2026 by the employer.
Lead the definition and evolution of the Tin Management architecture for future lithography light sources.
About the role
This involves addressing challenges related to tin debris generated during the laser-produced plasma (LPP) process, which is critical for protecting source hardware and enabling higher source power.
What you'll do
- Define and drive the long-term Tin Management architecture and technology roadmap, identifying challenges and development priorities.
- Shape experimental strategies and learning plans for research test rigs to produce actionable system-level insights.
- Define modeling, simulation, AI, and data capabilities required to support Tin Management decisions.
- Drive technical alignment between research, system engineering, and product development teams regarding Tin Management.
- Capture, document, and communicate architectural learnings and technology recommendations to leadership.
- Provide technical leadership for Tin Management initiatives while engaging in hands-on technology development.
What you'll need
- Ph.D. in Physics, Engineering, Applied Mathematics, or a related discipline, with 5+ years of relevant experience.
- Demonstrated expertise in complex physical systems and one or more areas such as thermodynamics, fluid dynamics, plasma physics, lasers, or photonics.
- Strong background in experimentation, modeling, simulation, and data-driven decision making.
- Experience applying computational modeling, data analytics, AI/ML, and digital engineering tools.
- Proven experience developing and maintaining multi-year technology roadmaps.
- Demonstrated ability to influence technical direction across organizational boundaries.
Skills: Tin Management, EUV source, lithography machines, plasma physics, technology roadmap
This role has been open 42 days — well below the 77-day median for Semiconductor Equipment Engineering roles.
Semiconductor Equipment Engineering · Lithography Systems
|
Open roles in category
53
|
Median days open
77 d
|
Median salary
$130k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | ASML | All employers we track in this specialty (53 roles · 12 employers) |
|---|---|---|
| Open roles in this specialty | 29 | 53 |
| Open roles in the wider Process, Fab & Equipment family | 324 | 9887 · 109 employers |
| Median days open | 42 d | 77 d (−35 d vs this employer) |
| Median salary (USD postings) | — | $130k |
Skills observed across this category: Tin Management, EUV source, lithography machines, plasma physics, technology roadmap
Who's hiring in this category
- ASML (this employer) · 29 open roles · median 42 d
- Applied Materials · 4 open roles · median 104 d
- GlobalFoundries · 4 open roles · median 114 d
- Micron Technology · 4 open roles · median 157 d
- Onto Innovation · 3 open roles · median 84 d
- NXP Semiconductors · 2 open roles · median 112 d
How we counted: 53 open Semiconductor Equipment Engineering (Lithography Systems) roles from 12 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.