Originally posted 7 July 2026 by the employer.
About the role
Qorvo is seeking a Principal Research Scientist to serve as a principal investigator and technical contributor leading the development of wafer-level interconnects (BEOL), wafer-level packaging (WLP), and heterogeneous integration technologies. The role involves guiding R&D teams, securing funded programs, and transitioning research concepts into manufacturable solutions for integrated circuit and packaging applications.
What you'll do
- Lead research initiatives in wafer-level interconnects, BEOL, WLP, and heterogeneous integration as a principal investigator. - Author and influence technology roadmaps aligned with long-term product and innovation strategies. - Drive proposal development, technical shaping, capture, and execution of externally funded programs. - Direct hands-on process ideation, development, pathfinding, troubleshooting, and execution for wafer and packaging technologies. - Direct technicians, junior engineers, and process engineers to execute development activities in cleanroom environments. - Generate intellectual property, including patents, invention disclosures, and proprietary process know-how.
What you'll need
- Ph.D. in Materials Science, Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, or a related technical field. - 8+ years of hands-on semiconductor R&D experience in cleanroom fabrication environments. - Demonstrated expertise in semiconductor BEOL processing and wafer-level packaging (WLP) technologies. - Hands-on experience with advanced metallization, dielectric integration, and interconnect process development. - Proven experience leading and guiding multidisciplinary R&D teams. - Experience with proposal development, technical reporting, and technical presentations.
Nice to have
- 3+ years of experience serving as a Principal Investigator or technical lead for advanced R&D programs. - GaN RF transistor fabrication experience. - Experience leading or executing R&D programs sponsored by U.S. Government agencies such as DARPA or AFRL. - Expertise in 3D heterogeneous integration (3DHI), including wafer-to-wafer bonding, die-to-wafer bonding, Cu-Cu hybrid bonding, wafer thinning, lap/grind, and TSV technologies. - Hands-on experience with semiconductor process modules including lithography (stepper or e-beam), etch, metallization, CMP, and SEM/FIB analysis. - Experience with device processing and DC/RF characterization, including S-parameters and load-pull measurements.
This role has been open 136 days — well above the 62-day median for Process Integration roles.
Process Integration · Advanced Packaging
|
Open roles in category
88
|
Median days open
62 d
|
Median salary
$182k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (88 roles · 21 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 88 |
| Open roles in the wider Process, Fab & Equipment family | 64 | 10080 · 106 employers |
| Median days open | 136 d | 62 d (+74 d vs this employer) |
| Median salary (USD postings) | — | $182k |
Who's hiring in this category
- Micron Technology · 18 open roles · median 38 d
- SkyWater Technology · 13 open roles · median 3 d
- GlobalFoundries · 11 open roles · median 123 d
- Intel Corporation · 9 open roles · median 74 d
- Applied Materials · 8 open roles · median 37 d
- Renesas Electronics · 7 open roles · median 39 d
How we counted: 88 open Process Integration (Advanced Packaging) roles from 21 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.
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