Principal Memory Design Engineer, HBM - Richardson, TX, United States
Originally posted 16 July 2026 by the employer.
HBM
About the role
As a Principal Memory Design Engineer, you will architect and deliver high-performance DRAM circuit compositions for advanced technology nodes. This role focuses on developing innovation across building, layout, verification, and silicon validation for HBM.
What you'll do
- Design and optimize DRAM circuits spanning digital, analog, and memory core subsystems.
- Develop and refine floorplans, routing strategies, and power delivery networks.
- Perform advanced circuit simulations using FINESIM, HSPICE, and VERILOG.
- Model parasitics, verify power and signal integrity, and support validation.
- Drive simulation-to-silicon correlation, identify gaps, and recommend schematic and layout improvements.
- Lead technical reviews, documentation, and best-practice standardization.
What you'll need
- BS in Electrical Engineering or related field, or equivalent experience.
- Strong hands-on expertise with Cadence Virtuoso, physical layout, and circuit floorplanning.
- Proven experience using FINESIM, HSPICE, and VERILOG for complex circuit simulation and analysis.
- Demonstrated ability to solve ambitious technical problems with significant design or innovation impact.
- Deep knowledge of DRAM subsystem architecture, operation, or building.
Nice to have
- MS or PhD in Electrical Engineering or a related field, or equivalent experience.
- Strong industry awareness of memory technology trends and emerging design methodologies.
- Exceptional communication and leadership skills with the ability to influence across organizations.
Skills: DRAM circuits, memory core subsystems, FINESIM, HSPICE, VERILOG
This role has been open 80 days — well above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: DRAM circuits, memory core subsystems, FINESIM, HSPICE, VERILOG
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.