Principal Front-End Design Engineer
Originally posted 20 October 2026 by the employer.
About the role
As a Principal Front-End Design Engineer on the Digital Methodology Interop Engineering team, you will lead methodology, subsystem architecture, and AI-enabled design solutions across IP and SoC development.
What you'll do
- Develop and deploy AI-driven solutions for verification, synthesis, constraints, and DFT workflows. - Architect reusable subsystem reference designs for Synopsys IP. - Debug and optimize front-end design methodologies and automation flows. - Drive adoption of best practices across design and verification teams. - Collaborate with EDA, IP, and customer-facing engineers to solve complex design challenges. - Mentor engineers through technical leadership and knowledge sharing.
What you'll need
- BS or MS in Electrical Engineering, Computer Engineering, or related field. - 10+ years of ASIC, SoC, or IP design and verification experience. - Expertise in verification, synthesis, timing constraints, DFT, CDC/RDC, or lint methodologies. - Strong experience with Synopsys tools such as VCS, VC SpyGlass, Fusion Compiler, Design Compiler, and TestMAX. - Proficiency in SystemVerilog, UVM, Tcl, Python, or similar languages. - Demonstrated technical leadership and influence across cross-functional engineering teams.
Skills: AI-driven, synthesis, constraints, DFT, SystemVerilog, Fusion Compiler
This role has been open 0 days — well below the 40-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · AI EDA Design
|
Open roles in category
60
|
Median days open
40 d
|
Median salary
$203k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (60 roles · 22 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 60 |
| Open roles in the wider Physical Implementation family | 107 | 1464 · 110 employers |
| Median days open | 28 d | 40 d (−12 d vs this employer) |
| Median salary (USD postings) | — | $203k |
Skills observed across this category: AI-driven, synthesis, constraints, DFT, SystemVerilog, Fusion Compiler
Who's hiring in this category
- NXP Semiconductors · 12 open roles · median 69 d
- NVIDIA · 9 open roles · median 27 d
- Keysight Technologies · 6 open roles · median 21 d
- Cadence Design Systems · 5 open roles · median 74 d
- Skyworks · 3 open roles · median 6 d
- Synopsys (this employer) · 3 open roles · median 46 d
How we counted: 60 open EDA/CAD Engineering (AI EDA Design) roles from 22 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.