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Etched

Research Engineer, RL Frontiers - San Jose, United States

Etched San Jose, United States Full-time 1 day ago
Physical Design & EDA

$400,000 USD yearly

Originally posted 21 October 2026 by the employer.

About the role

As a Research Engineer on the RL Frontiers team at Etched, you will train proprietary frontier models to automate kernel development, ASIC engineering, production pipelines, and 3-D hardware operating systems. You will use proprietary simulators and environments to build custom data mixes and post-train models on engineering tasks.

What you'll do

- Own the post-training stack end to end. - Build RL environments alongside ASIC, kernel, and supercomputing engineers, rewarded by simulation, formal tools, tests, and hardware measurements. - Create custom data mixes to reach high performance on targeted tasks. - Create benchmarks that drive productivity in models and prevent reward hacking.

What you'll need

- Hands-on post-training experience, including SFT and RL (such as PPO, GRPO), with a track record of shipping models used in production. - Experience taking a model from poor performance to strong results on a task it was not originally built for, especially under scarce data constraints. - Strong software engineering skills in PyTorch and distributed training. - Understanding of the systems side of RL to optimize iteration speed and compute efficiency. - Ability to execute effectively under compute and data constraints.

Nice to have

- Experience with RL or post-training frameworks (such as verl, OpenRLHF, TRL, or prime-rl) or inference engines (such as vLLM or SGLang). - Experience with agentic, multi-turn RL with verifiable rewards. - Experience with distillation and training small, specialized models for production. - Background in ASIC design or verification, accelerator kernels, or large-scale compute infrastructure.

Skills: Reinforcement Learning, Post-training, PyTorch, ASIC, EDA

Market context

This role has been open 0 days — well below the 40-day median for EDA/CAD Engineering roles.

EDA/CAD Engineering · AI EDA Design

Open roles in category
60
Median days open
40 d
Median salary
$203k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Etched compares in EDA/CAD Engineering hiring
Metric Etched All employers we track in this specialty (60 roles · 22 employers)
Open roles in this specialty 1 60
Open roles in the wider Physical Implementation family 8 1464 · 110 employers
Median days open 0 d 40 d (−40 d vs this employer)
Median salary (USD postings) — $203k

Skills observed across this category: Reinforcement Learning, Post-training, PyTorch, ASIC, EDA

Who's hiring in this category

  • NXP Semiconductors · 12 open roles · median 69 d
  • NVIDIA · 9 open roles · median 27 d
  • Keysight Technologies · 6 open roles · median 21 d
  • Cadence Design Systems · 5 open roles · median 74 d
  • Skyworks · 3 open roles · median 6 d
  • Synopsys · 3 open roles · median 46 d

How we counted: 60 open EDA/CAD Engineering (AI EDA Design) roles from 22 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.

Apply now
San Jose, United States
On-site
Full-time
$400,000 USD yearly
1 day ago

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