Principal ESD Engineer - Chandler, United States
Originally posted 14 September 2026 by the employer. Relisted by the employer on 15 October 2026.
Drive ESD methodology and IP development for FinFET technologies and SerDes products.
About the role
As a Principal ESD Engineer, you will drive ESD methodology, IP development, and sign-off verification for advanced semiconductor products. This role focuses on FinFET technologies and high-speed interfaces.
What you'll do
- Lead ESD architecture development for advanced-node semiconductor products.
- Design and optimize custom ESD protection devices, clamps, and ESD IP solutions.
- Provide co-design support to maximize both performance and ESD protection robustness.
- Lead ESD sign-off reviews and risk assessments for complex SoCs and mixed-signal products.
- Develop and maintain automated ESD verification methodologies and flows.
- Support silicon characterization using HBM, CDM, TLP, VF-TLP, and Latch-Up testing.
What you'll need
- M.S. or Ph.D. in Electrical Engineering or related field.
- 10+ years of semiconductor ESD design experience.
- Strong knowledge of ESD device physics, HBM, CDM, TLP, VF-TLP, Latch-Up, Advanced CMOS and FinFET technologies.
- Hands-on experience with ESD protection design for FinFET SoCs and SerDes products.
- Hands-on experience in ESD cell design and custom ESD IP development.
- Strong knowledge of ESD sign-off methodologies and verification techniques.
- Experience with Calibre PERC or equivalent ESD verification tools.
- Proven ability to develop and deploy ESD methodologies across multiple product families and technology nodes.
Nice to have
- Hands-on experience developing and maintaining Calibre PERC rule decks.
- Experience supporting advanced-node AI, HPC, networking, memory, or data-center products.
- Experience with IEC/EMC or system-level ESD considerations.
Skills: ESD architecture, ESD protection devices, HBM, CDM, TLP, FinFET, SerDes products, Calibre PERC
This role has been open 31 days — well below the 71-day median for Analog IC Design roles.
Analog IC Design · Analog Design
|
Open roles in category
315
|
Median days open
71 d
|
Median salary
$149k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (315 roles · 51 employers) |
|---|---|---|
| Open roles in this specialty | 23 | 315 |
| Open roles in the wider Analog & Mixed-Signal family | 83 | 1423 · 106 employers |
| Median days open | 31 d | 71 d (−40 d vs this employer) |
| Median salary (USD postings) | — | $149k |
Skills observed across this category: ESD architecture, ESD protection devices, HBM, CDM, TLP, FinFET, SerDes products, Calibre PERC
Who's hiring in this category
- Texas Instruments · 38 open roles · median 75 d
- Analog Devices · 25 open roles · median 24 d
- Micron Technology · 25 open roles · median 80 d
- Renesas Electronics (this employer) · 24 open roles · median 31 d
- NXP Semiconductors · 19 open roles · median 79 d
- onsemi · 15 open roles · median 122 d
How we counted: 315 open Analog IC Design (Analog Design) roles from 51 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.