Principal Engineer- HIG HBM Layout - Hyderabad - Phoenix Aquila, India
Originally posted 9 June 2026 by the employer.
About the role
This role involves leading end-to-end layout execution of analog, mixed-signal, custom digital blocks and full-chip integration for HBM products. You will own full-chip technical decisions covering analog, digital, memory, ESD, and EM/IR to ensure optimal performance, power, and area.
What you'll do
- Lead end-to-end layout execution of analog, mixed-signal, custom digital blocks and full-chip integration for HBM products.
- Own full-chip technical decisions covering analog, digital, memory, ESD, EM/IR, ensuring optimal performance, power, and area (PPA).
- Drive project planning and execution, including area/time estimation, scheduling, task delegation, and milestone tracking across multiple concurrent programs.
- Perform and oversee layout verification activities including LVS, DRC, Antenna checks, and ensure closure with proper documentation and audits.
- Lead and mentor the layout team, guiding junior engineers on sub-block execution, conducting design reviews, and enabling capability development.
- Collaborate with global cross-functional teams (Design, Verification, IP, Packaging) and ensure strong communication for project alignment and success.
What you'll need
- 15+ years experience in analog/custom layout in advanced CMOS process.
- 4+ years developing teams and project experience.
- Experience in leading multiple project and Tape-out.
- Expertise in Cadence VLE/VXL.
- Expertise in Calibre DRC/LVS.
- Strong skills in layout and floor planning skills and manual routing.
- Experienced in running multiple Custom IC layout projects.
- BE or MTech in Electronic/VLSI Engineering.
Skills: HBM, layout execution, Array Layout, analog/mixed-signal blocks, Cadence VLE/VXL, Calibre DRC/LVS
This role has been open 117 days — well above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: HBM, layout execution, Array Layout, analog/mixed-signal blocks, Cadence VLE/VXL, Calibre DRC/LVS
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.