Principal Engineer, Design Verification - Ho Chi Minh, Vietnam
Originally posted 30 July 2026 by the employer — open 42 days.
About the role
This role involves the design verification of circuitry within chips for innovative storage technologies, including read channels, processors, transceivers, analog designs, and cryptographic engines. This work supports solutions across the hard disk drive (HDD), solid-state drive (SSD), PC, server, cloud, and enterprise systems markets.
What you'll do
- Develop and implement verification plans for read channel storage IP designs.
- Create and maintain testbenches using industry-standard verification tools and methodologies.
- Perform functional and performance verification of complex digital designs.
- Collaborate with design and architecture teams to identify and resolve design issues.
- Analyze and debug simulation failures and provide detailed reports on verification results.
- Mentor and guide junior verification engineers.
What you'll need
- BS/MS/PhD Degree in Electrical Engineering / Computer Engineering / Electronics and Telecommunications Engineering, or a related field.
- Proficiency in verification languages such as SystemVerilog, UVM, and scripting languages (Python, Perl).
- Understanding of ASIC design flow and digital design and verification methodologies.
- Experience with industry-standard EDA tools (Cadence, Synopsys, Mentor Graphics).
- Strong mathematical skills.
- Experience with Digital Signal Processing (DSP) and knowledge of DSP modeling in C/C++.
Nice to have
- Experience with high-speed DSP design verification.
Skills: SystemVerilog, UVM, testbenches, digital design, DSP
This role has been open 42 days — well below the 56-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1123
|
Median days open
56 d
|
Median salary
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (1123 roles · 90 employers) |
|---|---|---|
| Open roles in this specialty | 48 | 1123 |
| Open roles in the wider Digital Design & Verification family | 116 | 3042 · 114 employers |
| Median days open | 115 d | 56 d (+59 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: SystemVerilog, UVM, testbenches, digital design, DSP
Who's hiring in this category
- Qualcomm · 98 open roles · median 48 d
- AMD · 97 open roles · median 29 d
- NVIDIA · 95 open roles · median 58 d
- Micron Technology · 53 open roles · median 96 d
- Arm Holdings · 49 open roles · median 65 d
- Marvell Technology (this employer) · 48 open roles · median 115 d
How we counted: 1123 open Design Verification (Design Verification) roles from 90 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.