$127,400 - $236,600 USD yearly
Support advanced node STA, UPF constraints debugging, and 3DIC design signoff across Cadence digital implementation flows.
Originally posted 6 November 2026 by the employer.
About the role
Cadence Design Systems is seeking a Principal Application Engineer to provide pre-sales and post-sales technical support for Digital Implementation and Signoff tools. In this role, you will support sales campaigns through workshops, benchmarks, product demonstrations, and methodology consultations.
What you'll do
- Present the technical capabilities of Cadence Digital Implementation and Signoff tools and flows, including Synthesis, Place and Route, and Timing/Physical/Power Signoff.
- Identify product opportunities at existing and prospective customers, collaborating with account teams to define and execute technical campaigns.
- Support technical evaluations and benchmarks to deliver Cadence solution implementations.
- Provide ongoing customer support and drive usage proliferation on-site and off-site.
- Collaborate with R&D on tool enhancements and methodology improvements.
- Author and contribute technical content for Cadence Online Support.
What you'll need
- BS in Electrical Engineering with 8 to 10 years of experience, or MS in Electrical Engineering with 6 to 8 years of experience.
- Core timing signoff expertise covering advanced node STA, UPF and constraints debugging, as well as hierarchical and 3DIC design STA and closure solutions.
- Solid grounding in digital design fundamentals, semiconductor fundamentals, and static timing analysis.
- Hands-on experience with ASIC digital implementation flows and tools.
- Working knowledge of a scripting language such as TCL, Perl, or Python.
- Willingness and ability to travel up to 20%.
Skills: STA, digital implementation, signoff, Tcl, 3DIC
More semiconductor jobs: Cadence Design Systems jobs · Field applications engineer jobs
This role has been open 0 days — well below the 43-day median for Applications FAE roles.
Applications FAE · EDA Tools
|
Open roles in category
123
|
Median days open
43 d
|
Category median salary (all employers)
$182k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (123 roles · 10 employers) |
|---|---|---|
| Open roles in this specialty | 38 | 123 |
| Median days open | 29 d | 43 d (−14 d vs this employer) |
| Median salary (USD postings) | — | $182k |
Skills observed across this category: STA, digital implementation, signoff, Tcl, 3DIC
Who's hiring in this category
- Synopsys · 66 open roles · median 35 d
- Cadence Design Systems (this employer) · 35 open roles · median 38 d
- Keysight Technologies · 9 open roles · median 71 d
- Renesas Electronics · 6 open roles · median 84 d
- ASML · 2 open roles · median 33 d
- Amazon · 1 open role · median 37 d
How we counted: 123 open Applications FAE (EDA Tools) roles from 10 employers tracked in the SemiconductorJobs index, counted 6 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.