Power Manufacturing Test Development Engineer - Sunnyvale, CA, United States
$180,000 - $220,000 USD yearly
Originally posted 23 October 2026 by the employer.
About the role
Cerebras Systems is seeking a Manufacturing Test Development Engineer to develop, implement, and optimize automated manufacturing test solutions for computing hardware. The role focuses on designing and deploying test fixtures, hardware interfaces, qualifying manufacturing test processes, and driving production test coverage, yield, throughput, and reliability.
What you'll do
- Develop and maintain automated test systems for computing hardware, including system boards, high-speed interconnects, power delivery, cooling subsystems, and integrated computing platforms. - Design manufacturing test strategies covering board-level functional testing, system integration, hardware diagnostics, and final system acceptance. - Develop test procedures, test specifications, test fixtures, and supporting documentation for new product introduction (NPI) and production ramp. - Integrate test equipment, programmable power supplies, electronic loads, oscilloscopes, digital multimeters, communication interfaces, and hardware management controllers. - Troubleshoot manufacturing test failures and collaborate with cross-functional teams to identify root causes and implement corrective actions. - Support NPI builds, pilot production, manufacturing qualification, and station deployment with contract manufacturing teams.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Mechanical Engineering, Computer Engineering, Computer Science, or a related technical discipline, or equivalent practical experience. - 5+ years of experience in manufacturing test development, hardware validation, test automation, or production engineering. - Proficiency in Python for test automation, hardware control, data processing, and diagnostic development. - Hands-on experience testing electronic assemblies, computer systems, embedded hardware, or electromechanical products. - Experience integrating automated test software with laboratory or manufacturing test equipment. - Understanding of digital electronics, power electronics fundamentals, communication interfaces, and hardware bring-up. - Experience working with contract manufacturers and outsourced manufacturing operations.
Nice to have
- Experience with automated manufacturing test frameworks, hardware-in-the-loop testing, and production test station development. - Familiarity with statistical process control (SPC), failure analysis, root-cause methodologies, and corrective action processes. - Experience with SQL, dashboards, data visualization, or other tools for manufacturing test data analysis. - Knowledge of design for testability, design for manufacturability, and manufacturing process qualification.
This role has been open 0 days — well below the 35-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
559
|
Median days open
35 d
|
Median salary
$176k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Cerebras | All employers we track in this specialty (559 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 559 |
| Open roles in the wider Silicon Validation & Test family | 4 | 2240 · 112 employers |
| Median days open | 12 d | 35 d (−23 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Who's hiring in this category
- Teradyne · 76 open roles · median 28 d
- Infineon Technologies · 46 open roles · median 39 d
- Renesas Electronics · 46 open roles · median 29 d
- Qualcomm · 31 open roles · median 35 d
- Micron Technology · 28 open roles · median 39 d
- Texas Instruments · 26 open roles · median 30 d
How we counted: 559 open Silicon Test Engineering (DFT Test) roles from 78 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.