Post-Silicon/Pre-Silicon Validation Engineer - CA, Santa Clara, United States
Verification, Validation & Test
Originally posted 16 September 2026 by the employer.
About the role
This role focuses on the enablement, validation, and debugging of USB, HSIO(UFS), and LSIO features across AMD Client and Gaming platforms.
What you'll do
- Enable USB4, USB3, Power Delivery, and Retimer features on AMD Client and Gaming platforms.
- Enable assigned HSIO(UFS) and LSIO technologies including SPI, eSPI, SSPI, SFHIO, I2C, I3C, UART, and related interfaces on AMD Client and Gaming platforms.
- Utilize protocol analyzers, oscilloscopes, software tools, and test devices to investigate and resolve USB hardware and software issues.
- Define system-level requirements including board, software, retimer, and power delivery requirements based on USB interface specifications.
- Review internal and external USB technical specifications to develop feature requirements and validation methodologies for both pre-silicon (FPGA) and post-silicon environments.
- Collaborate with internal engineering teams and external vendors to enable features, investigate issues, identify root causes, and drive resolution of USB-related failures.
What you'll need
- Strong technical foundation in silicon development, system enablement, and debugging.
- Experience with system enablement and debug activities.
- Experience capturing and analyzing high-speed protocol traces for USB4, USB3, DisplayPort, and associated technologies.
- Experience with scripting or automation using languages such as Perl, Ruby, Shell, Python, or similar technologies.
- Understanding of computer architecture and x86-based system architecture.
- Knowledge of ACPI, GPIO, and clock management technologies.
- Ability to review circuit schematics and assist with board-level debugging and hardware modifications.
- Technical knowledge spanning hardware, system architecture, and software domains.
Nice to have
- Experience leveraging AI-assisted tools, intelligent automation, or agent-based workflows to support debugging, analysis, and engineering productivity.
- Experience with Xilinx FPGA development and debugging.
- Experience reviewing, debugging, and modifying C/C++ firmware or embedded software.
- Familiarity with Windows, UEFI, Linux, and Unix operating systems.
Market context
This role has been open 27 days — well below the 62-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Design Verification
|
Open roles in category
112
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (112 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 15 | 112 |
| Open roles in the wider Silicon Validation & Test family | 153 | 2211 · 111 employers |
| Median days open | 61 d | 62 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 18 open roles · median 44 d
- AMD (this employer) · 15 open roles · median 61 d
- NVIDIA · 14 open roles · median 68 d
- Graphcore · 10 open roles · median 119 d
- Amazon · 6 open roles · median 38 d
- Micron Technology · 5 open roles · median 209 d
How we counted: 112 open Post-Silicon Validation (Design Verification) roles from 29 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.