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Tenstorrent

Post-Silicon Lab Manager - Santa Clara, California, United States

Tenstorrent Santa Clara, California, United States 13 days ago
Verification, Validation & Test

$100,000 - $500,000 USD yearly

Originally posted 28 September 2026 by the employer.

Own the post-silicon lab infrastructure for RISC-V CPU architectures and chiplet solutions.

About the role

This role involves owning the post-silicon lab infrastructure and managing operational workflows supporting bring-up, system validation, and customer enablement.

What you'll do

  • Run day-to-day lab operations for CPU post-silicon validation, power/performance assessment, and debug.
  • Lead the lab environment for first-silicon power-on, system bring-up, and platform validation.
  • Deploy and maintain server racks, data acquisition, power telemetry rigs, and automated test benches for multi-core CPU and chiplet-based systems.
  • Manage the CapEx budget for scopes, logic/protocol analyzers, and traffic generators.
  • Own inventory, calibration cycles, silicon allocation tracking, and lab safety compliance using JIRA, Confluence, and lab scheduling tools.

What you'll need

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or a similar technical field.
  • 8–12+ years in semiconductor hardware, including 3+ years leading a post-silicon validation, characterization, or hardware lab team focused on CPUs.
  • In-depth knowledge of high-speed interfaces (PCIe, DDR/GDDR/HBM, SerDes) and fabric links.
  • Hands-on experience with board-level debug tools.
Market context

This role has been open 12 days — well below the 54-day median for Post-Silicon Validation roles.

Post-Silicon Validation · Design Verification

Open roles in category
119
Median days open
54 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How Tenstorrent compares in Post-Silicon Validation hiring
Metric Tenstorrent All employers we track in this specialty (119 roles · 29 employers)
Open roles in this specialty 2 119
Open roles in the wider Silicon Validation & Test family 8 2196 · 111 employers
Median days open 12 d 54 d (−42 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm · 20 open roles · median 32 d
  • AMD · 16 open roles · median 58 d
  • NVIDIA · 15 open roles · median 64 d
  • Graphcore · 10 open roles · median 115 d
  • Amazon · 6 open roles · median 34 d
  • Synopsys · 6 open roles · median 3 d

How we counted: 119 open Post-Silicon Validation (Design Verification) roles from 29 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.

Apply now
Santa Clara, California, United States
On-site
$100,000 - $500,000 USD yearly
13 days ago

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