PMU Design Verification Engineer: Analog & Mixed Signal Engineer
About the role
This role is responsible for ensuring high quality silicon for IC chips and IPs through all phases of pre-silicon verification. Daily work involves full-chip verification of mixed-signal systems using a combination of analog circuits and RTL in the same simulation.
What you'll do
- Develop detailed test and coverage plans based on IC specifications.
- Complete verification plans from beginning to end, including test bench and environment bring-up, regressions, failure debug, and tape-out.
- Develop verification methodology suitable for the IP, ensuring scalability and portability.
- Develop verification environments, including stimuli, checkers, assertions, trackers, and coverage.
- Sign-off mixed signal designs in preparation for tapeout.
What you'll need
- BS degree and a minimum of 3 years of relevant industry experience.
- Experience verifying mixed signal IC designs using a combination of analog circuits and RTL in the same simulation.
- Background in pre-silicon verification, including writing verification plans, running simulations, triaging issues, and reviewing results.
Nice to have
- Proficiency in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.
- Familiarity with authoring analog assertion checks to catch bugs.
- Understanding of power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, bandgaps, data converters, and/or clock generators.
- Familiarity with verification methodologies and tools, including simulators, waveform viewers, execution automation, coverage collection, and gate level simulations.
- Scripting or programming background in languages such as TCL, Skill, Python, and/or PERL.
- Familiarity with analog behavioral models.
Skills: SystemVerilog, Verilog-AMS, analog verification, PMU, simulations
More semiconductor jobs: Verification engineer jobs
This role has been open 0 days — well below the 59-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1272
|
Median days open
59 d
|
Category median salary (all employers)
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (1272 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 75 | 1272 |
| Open roles in the wider Digital Design & Verification family | 172 | 3381 · 114 employers |
| Median days open | 13 d | 59 d (−46 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: SystemVerilog, Verilog-AMS, analog verification, PMU, simulations
Who's hiring in this category
- Qualcomm · 114 open roles · median 46 d
- NVIDIA · 97 open roles · median 74 d
- AMD · 85 open roles · median 60 d
- Apple (this employer) · 72 open roles · median 12 d
- Synopsys · 71 open roles · median 47 d
- SiFive · 59 open roles · median 60 d
How we counted: 1272 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 2 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.