Platform / System Debug Validation Engineer - TX, Austin_Research Park, United States
Originally posted 23 July 2026 by the employer.
Debug complex HW/FW issues and validate systems connecting to the GPU SOC, including PCIe, retimers, and HBM.
About the role
The Datacenter Platform Engineering Group (DPEG) is looking for an experienced system level debug engineer responsible for Data Center deployments and ensuring availability and uptime of a large number of systems.
What you'll do
- Perform debug and triage of complex issues using industry tools to drive root cause analysis across GPU and system-level hardware and software flows. - Probe board components, check electrical and power currents, and validate systems addressing electrical complexities, direct liquid cooling, and complex cluster networks. - Apply RAS knowledge to root cause failures and issues observed at the GPU level. - Document flows and methodologies for bring-up, boot-up, system initialization, and debug. - Guide and direct junior-level engineers in troubleshooting technical problems and resolving service-level tickets.
What you'll need
- Bachelors or Masters degree in electrical or computer engineering. - Experience debugging complex HW/FW issues and understanding the flow of a GPU through different system layers. - Hands-on experience with hardware validation and troubleshooting in a Data Center environment. - Technical understanding of components connecting to the GPU SOC, including PCIe, VRs, retimers, HBM, and internal networking. - Familiarity with system level debug at all levels alongside RAS knowledge.
Nice to have
- Experience in Systems Integration and SoC and/or System debug of complex issues. - Hands-on experience using industry debug tools, scopes, and examining board-level power. - Proven ability to drive resolution of critical problems and manufacturing issues within a lab or Data Center with external partners. - Experience developing and documenting debug capabilities on a given SOC and System.
Skills: system level debug, silicon bring-up, GPU SOC, RAS knowledge, Data Center environment
This role has been open 88 days — well above the 44-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
411
|
Median days open
44 d
|
Median salary
$172k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (411 roles · 61 employers) |
|---|---|---|
| Open roles in this specialty | 58 | 411 |
| Open roles in the wider Silicon Validation & Test family | 148 | 2227 · 113 employers |
| Median days open | 46 d | 44 d (+2 d vs this employer) |
| Median salary (USD postings) | — | $172k |
Skills observed across this category: system level debug, silicon bring-up, GPU SOC, RAS knowledge, Data Center environment
Who's hiring in this category
- AMD (this employer) · 58 open roles · median 45 d
- Micron Technology · 39 open roles · median 41 d
- Qualcomm · 36 open roles · median 30 d
- NVIDIA · 26 open roles · median 25 d
- Microchip Technology · 22 open roles · median 70 d
- Graphcore · 20 open roles · median 123 d
How we counted: 411 open Post-Silicon Validation (Silicon Validation) roles from 61 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.