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onsemi

Package Development Engineer - San Jose, CA, United States

onsemi San Jose, CA, United States 25 days ago
Packaging & Advanced Integration

$150,000 - $249,780 USD yearly

Originally posted 9 September 2026 by the employer — open 1 day.

This role focuses on Multi-Phase Power Module, DrMOS, and Smart Power Stage (SPS) packages.

About the role

This role involves leading the development and qualification of advanced multi-Phase Power Module, DrMOS, and Smart Power Stage (SPS) packages.

What you'll do

  • Lead package development from concept through production release.
  • Define package architecture, materials selection, and assembly process flow.
  • Develop and optimize substrate designs including stack-up, routing, power planes, via structures, and thermal features.
  • Drive flip-chip integration, bump design, underfill selection, and assembly process optimization.
  • Lead package qualification and reliability testing per JEDEC and IPC standards.
  • Collaborate with OSATs and suppliers on DFM, process development, yield improvement, and cost reduction.

What you'll need

  • BS/MS in Electrical Engineering, Materials Science, Mechanical Engineering, or related field.
  • 10+ years of semiconductor package development experience.
  • Strong expertise in Multi-Phase Power Modules, DrMOS, and SPS packaging.
  • Strong expertise in advanced substrate design and manufacturing.
  • Strong expertise in flip-chip assembly and package integration.
  • Experience working with OSATs, substrate suppliers, and material vendors.
  • Proficiency in engineering tools and methodologies, including ACAD, 8D, SPC, DFMEA, DOE.

Nice to have

  • Strong expertise in passive component assembly and optimization.
  • Strong expertise in thermal management and reliability engineering.
  • Strong expertise in high-volume manufacturing and NPI processes.

Skills: package development, power module, substrate design, flip-chip integration, reliability qualification

Market context

This role has been open 0 days — well below the 68-day median for Packaging Engineering roles.

Packaging Engineering · Packaging

Open roles in category
201
Median days open
68 d
Median salary
$159k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How onsemi compares in Packaging Engineering hiring
Metric onsemi All employers we track in this specialty (201 roles · 45 employers)
Open roles in category 6 201
Median days open 87 d 68 d (+19 d vs this employer)
Median salary (USD postings) — $159k

Skills observed across this category: package development, power module, substrate design, flip-chip integration, reliability qualification

Who's hiring in this category

  • Infineon Technologies · 28 open roles · median 30 d
  • Micron Technology · 22 open roles · median 132 d
  • Renesas Electronics · 18 open roles · median 39 d
  • Monolithic Power Systems · 12 open roles · median 174 d
  • Intel Corporation · 11 open roles · median 139 d
  • onsemi (this employer) · 6 open roles · median 86 d

How we counted: 201 open Packaging Engineering (Packaging) roles from 45 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.

Apply now
San Jose, CA, United States
On-site
$150,000 - $249,780 USD yearly
25 days ago

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