Package Design, Signal and Power Integrity Senior Staff Engineer - Santa Clara, CA, United States

Originally posted 5 October 2026 by the employer.

Marvell’s central advanced packaging organization develops advanced IC packages that support high-speed interfaces.

About the role

This role involves contributing to the development of advanced microelectronic packages for semiconductors supporting 448 Gb/s data rates and beyond within Marvell's central advanced packaging organization.

What you'll do

• Contribute to the development of advanced microelectronic packages for semiconductors.
• Operate independently in technically ambiguous areas and identify gaps.
• Develop improved approaches for package design and characterization.
• Design, model, and characterize package interconnects.
• Develop simulation methodologies and correlate with measurements.
• Explore new interconnect architectures and develop design rules for custom high-speed interfaces.

What you'll need

• MS/PhD in Electrical Engineering or Computer Engineering with relevant industry experience.
• Strong understanding of transmission line theory & EM fundamentals.
• Deep understanding of frequency and time domain analysis in high speed design.
• Demonstrated ability to independently solve complex SI/PI problems.
• Experience driving SI/PI design from architecture through implementation & validation.
• Experience with developing SI/PI workflows and investigating tool trade-offs.
• Experience in using 2-D and 3-D EM simulation tools such as Ansys HFSS, SI-Wave, Cadence Clarity.
• Experience with power plane design, modeling, and analysis using tools like PowerSI, Siwave.
• Working knowledge of channel & circuit simulators like ADS, Hspice.
• Proven track-record of investigating channel/PDN behavior systematically and establishing root-cause.
• Experience with lab measurements and equipment such as VNA, TDR.
• Familiarity with layout tools like Allegro, APD or PADS.

Nice to have

• Familiarity with packaging technologies, materials, package substrate design rules and assembly rules.
• Knowledge of the thermal and mechanical analysis of the IC package development.
• Experience with high-speed electronic packaging for digital and analog ICs.
• Experience with 2.5D/3D package development.
• Experience with CPC/CPO connectors.
• Ability to automate SI, PI, and Packaging activities using scripting tools like Python.
• Ability to manage package development involving various cross functional teams like assembly development, IC physical layout teams, Analog and Digital designers, marketing.

Skills: IC package SI/PI, high-speed interfaces, 2.5D/3D package, EM simulation, transmission line theory