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Cirrus Logic

NVM Circuit Design Engineer (MH-US-50021294) - Austin, Texas, United States

Cirrus Logic Austin, Texas, United States Full-time 9 months ago
Digital Design & SoC Architecture

Originally posted 19 January 2026 by the employer.

About the role

As an NVM Circuit Design Engineer, you will provide technical leadership and drive the architecture and design of non-volatile memory (NVM) solutions used across Cirrus Logic’s product portfolio. You will own the development of embedded NVM IP from concept to silicon, balancing power, performance, and area.

What you'll do

- Architect and design embedded Non-Volatile Memory (NVM) solutions, including pre-decoders, drivers, and critical support circuitry. - Define and implement low-power operating modes and power domains to meet energy targets. - Lead internal NVM design reviews, ensuring quality, robustness, and technical execution. - Partner with test and validation teams to develop silicon characterization strategies for NVM macros. - Coordinate with PDK teams to establish NVM integration requirements and collaborate with design and verification engineers to integrate hard IP into system-level designs. - Engage with library teams to define, develop, and release memory views and models for integration and simulation.

What you'll need

- MS or PhD in Electrical Engineering with 7+ years of hands-on experience in Non-Volatile Memory (NVM) design. - Proficiency with Cadence design tools, including schematic capture, simulation, and layout. - Track record of innovation, with contributions to new IP development and patented technologies. - Experience in design-for-manufacturability (DFM) and design-for-test (DFT) methodologies for NVM. - Experience collaborating with external foundries across development cycles.

Nice to have

- Experience with emerging NVM technologies, such as MRAM or RRAM. - Familiarity with SRAM design. - Hands-on experience with NVM test chip design, bring-up, and silicon characterization.

Skills: IP integration, transistor-level design, power, performance, speed tradeoffs, low-leakage IP, Verilog models

Market context

This role has been open 220 days — well above the 65-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1077
Median days open
65 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Cirrus Logic compares in Digital/RTL Design hiring
Metric Cirrus Logic All employers we track in this specialty (1077 roles · 103 employers)
Open roles in this specialty 10 1077
Open roles in the wider Digital Design & Verification family 29 3346 · 116 employers
Median days open 193 d 65 d (+128 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: IP integration, transistor-level design, power, performance, speed tradeoffs, low-leakage IP, Verilog models

Who's hiring in this category

  • Qualcomm · 158 open roles · median 62 d
  • Synopsys · 87 open roles · median 38 d
  • AMD · 77 open roles · median 44 d
  • Analog Devices · 49 open roles · median 55 d
  • NXP Semiconductors · 42 open roles · median 94 d
  • NVIDIA · 36 open roles · median 51 d

How we counted: 1077 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Austin, Texas, United States
On-site
Full-time
9 months ago

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