New College Grad - Semiconductor Design Engineer - Boise, ID - Main Site, United States
Originally posted 21 July 2026 by the employer.
Design and optimize CMOS circuits for advanced DRAM and emerging memory technologies.
About the role
This role involves the design, simulation, optimization, and validation of digital and analog CMOS circuits for advanced DRAM and emerging memory technologies.
What you'll do
- Design, simulate, analyze, and optimize CMOS memory circuits and functional blocks, including memory arrays, control logic, datapaths, address decoding, and input/output interfaces.
- Support physical design activities such as floor planning, placement, routing optimization, layout verification, and manufacturability improvements.
- Perform circuit simulations and debugging using industry-standard tools (e.g., FINESIM, HSPICE, VERILOG).
- Collaborate with Product Engineering, Process Integration, Test, Assembly, CAD, Modeling, Verification, and other multi-functional partners.
- Leverage AI Assisted design tools, Agentic AI workflows, Generative AI solutions, and automation methodologies to improve simulation efficiency, design exploration, debug processes, and engineering productivity.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
- Foundational knowledge of CMOS circuit design, semiconductor devices, and device physics.
- Experience or academic exposure to circuit simulation and modeling tools such as FINESIM, HSPICE, SPICE, or VERILOG.
- Understanding of digital logic design, state machines, and design verification methodologies.
- Strong analytical, problem-solving, written communication, and collaboration skills.
Nice to have
- Experience or coursework in memory design technologies such as DRAM, NAND, SRAM, high-speed circuits, or mixed-signal design.
- Familiarity with Cadence Virtuoso, physical design flows, layout methodologies, and power delivery network (PDN) analysis.
- Programming or scripting experience using Python, Tcl, Perl, or similar languages.
- Experience using AI Assisted development tools, Code Assist, LLMs, or Generative AI technologies.
Skills: CMOS memory circuits, memory arrays, HSPICE, DRAM, NAND
This role has been open 75 days — slightly above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: CMOS memory circuits, memory arrays, HSPICE, DRAM, NAND
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.