Near-Memory Compute System Validation Engineer
$145,600 - $218,400 USD yearly
Originally posted 12 October 2026 by the employer.
Work on AI-centric memory and compute architectures, spanning High-Bandwidth Memory (HBM), Processing-in-Memory (PIM), and Near-Memory Compute (NMC).
About the role
This role focuses on content quality and system-level validation enablement, ensuring end-to-end silicon quality across pre- and post-silicon phases. You will work across HW and SW boundaries to develop, validate, and scale system-level test content on premium mobile, flagship platforms, data center, and AI Accelerator platforms.
What you'll do
- Develop AI, inference, and data-intensive bare-metal workloads to stress memory and compute subsystems.
- Root-cause complex hardware and software issues spanning SoC architecture, firmware, drivers, interconnects, memory systems, clocks, power domains, and low-power features.
- Enable silicon bring-up, qualification, and productization through deep technical analysis and cross-functional collaboration.
- Partner closely with architecture, design, firmware, software, emulation, FPGA, and silicon teams to solve challenging system-level problems.
What you'll need
- BS/MS/PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- 3 years of experience in memory validation, silicon validation, or platform bring-up.
- Proficiency in C/C++, Python, scripting, and low-level software development.
- Solid understanding of SoC architecture, embedded systems, operating systems, memory hierarchy, caches, coherency & concurrency.
- Experience with silicon bring-up, validation, and root-cause analysis.
- Familiarity with JTAG, kernel debuggers, lab instrumentation, and validation tools.
- Experience working across the hardware/software boundary in highly complex systems.
Nice to have
- Experience in Near-Memory Compute (NMC).
- Experience in Processing-in-Memory (PIM).
- Experience in High-Bandwidth Memory (HBM).
- Experience in LPDDR/DDR memory systems.
- Experience in Memory controllers.
- Experience in AI accelerators.
- Knowledge of AI GEMM and GEMV operations, DMA operations, multi-threading.
- Experience with AI/ML-assisted validation and debug methodologies.
- Experience with embedded firmware, device drivers, and bare-metal software.
- Experience with Emulation and post-silicon validation.
Skills: memory validation, silicon validation, platform bring-up, SoC architecture, AI accelerators, HBM, PIM, NMC
This role has been open 2 days — well below the 41-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
412
|
Median days open
41 d
|
Median salary
$166k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (412 roles · 61 employers) |
|---|---|---|
| Open roles in this specialty | 37 | 412 |
| Open roles in the wider Silicon Validation & Test family | 131 | 2219 · 112 employers |
| Median days open | 27 d | 41 d (−14 d vs this employer) |
| Median salary (USD postings) | — | $166k |
Skills observed across this category: memory validation, silicon validation, platform bring-up, SoC architecture, AI accelerators, HBM
Who's hiring in this category
- AMD · 58 open roles · median 41 d
- Micron Technology · 39 open roles · median 37 d
- Qualcomm (this employer) · 37 open roles · median 27 d
- NVIDIA · 25 open roles · median 22 d
- Graphcore · 21 open roles · median 120 d
- Microchip Technology · 20 open roles · median 70 d
How we counted: 412 open Post-Silicon Validation (Silicon Validation) roles from 61 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.