Microprocessor Silicon Validation and Optimization Engineer-Staff
$140,000 - $210,000 USD yearly
Originally posted 2 July 2026 by the employer.
About the role
As an ASIC Engineer, you will define, model, design, optimize, verify, validate, implement, and document IP block and SoC development for high performance, low power products.
What you'll do
- Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development. - Create architectures, circuit specifications, logic designs, and system simulations based on system-level requirements. - Collaborate across functional teams, including software architecture, hardware architecture, product management, and program management, to develop and execute implementation strategies. - Evaluate process flow from high-level design to synthesis, place and route, timing, power use, and verification, or custom circuit design/layout flow. - Utilize tools and applications such as RTL to GDS Flow and Virtuoso to execute architecture and design of complex blocks, SoCs, or IC Packages. - Write and review detailed technical documentation for complex EDA, IP, and ASIC projects.
What you'll need
- Bachelor's degree in Science, Engineering, or a related field with 4+ years of ASIC design, verification, validation, integration, or related experience (or Master's with 3+ years, or PhD with 2+ years). - Experience defining, modeling, designing, optimizing, verifying, or validating digital or analog IP (block/SoC). - Experience working with process flows spanning synthesis, place and route, timing, and power analysis.
Nice to have
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. - 6 years of ASIC design, verification, validation, integration, or related work experience. - 2 years of experience with architecture and design tools. - 2 years of experience with scripting tools and programming languages. - 2 years of experience with design verification methods. - 1 year of work experience in a role requiring interaction with senior leadership (Director level and above).
Skills: silicon validation, ASIC design, optimize, verify, validate
This role has been open 110 days — well above the 43-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
420
|
Median days open
43 d
|
Median salary
$168k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (420 roles · 62 employers) |
|---|---|---|
| Open roles in this specialty | 38 | 420 |
| Open roles in the wider Silicon Validation & Test family | 133 | 2244 · 112 employers |
| Median days open | 27 d | 43 d (−16 d vs this employer) |
| Median salary (USD postings) | — | $168k |
Skills observed across this category: silicon validation, ASIC design, optimize, verify, validate
Who's hiring in this category
- AMD · 57 open roles · median 47 d
- Micron Technology · 38 open roles · median 39 d
- Qualcomm (this employer) · 38 open roles · median 27 d
- NVIDIA · 26 open roles · median 24 d
- Microchip Technology · 22 open roles · median 72 d
- Graphcore · 20 open roles · median 125 d
How we counted: 420 open Post-Silicon Validation (Silicon Validation) roles from 62 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.