$120,000 - $275,000 USD yearly
Originally posted 15 June 2026 by the employer.
About the role
Responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management, and high-speed connectivity.
What you'll do
- Contribute to silicon architecture-to-design methodology across blocks, subsystems, and fullchip design. - Own entire subsystem, subsets, or chip-level silicon design deliverables from micro-architecture to sign-off ready design. - Plan and drive intermediate and sign-off reviews on micro-architecture and design specifications, execution progress, area, and timing closure towards design freeze and tapeout. - Work closely with verification, DFT, and physical design co-owners of the subsystem or block to deliver performance-power-area results.
What you'll need
- Concept-to-silicon experience driving silicon design for subsystems and top-level functions with ASICs and SOCs from architecture specification to production silicon. - 4+ years of experience with SystemVerilog, Python, C/C++, and similar scripting and programming languages for chip design and related flows. - Production-proven experience with silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), high-speed connectivity, or memory management. - Experience testing designs and working with verification teams toward performance and coverage closure goals. - Hands-on experience with design synthesis, design lint, and related flows to achieve sign-off. - Ability to work on-site in Mountain View, CA 3 days per week (Tuesday through Thursday).
Nice to have
- Familiarity with verification and emulation platforms and methodologies. - Experience with high speed I/O IP. - Experience with logic that focuses on moving, storing, or managing data such as caches, buffers, and crossbars.
This role has been open 129 days — well above the 63-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1078
|
Median days open
63 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | MatX | All employers we track in this specialty (1078 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 1078 |
| Open roles in the wider Digital Design & Verification family | 30 | 3322 · 115 employers |
| Median days open | 63 d | 63 d (same as this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 157 open roles · median 59 d
- Synopsys · 88 open roles · median 36 d
- AMD · 76 open roles · median 41 d
- Analog Devices · 49 open roles · median 52 d
- NXP Semiconductors · 42 open roles · median 91 d
- NVIDIA · 40 open roles · median 63 d
How we counted: 1078 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.