Memory Design Engineer - Singapore
Originally posted 17 July 2026 by the employer.
Design and characterize embedded SRAM and Register File IPs for ultra-low-power SoCs.
About the role
This role involves the architecture, design, compiler development, characterization, and silicon validation of embedded SRAM and Register File (RF) IPs for ultra-low-power SoCs.
What you'll do
- Design ultra-low power embedded SRAM and Register File IPs for advanced SoC products.
- Develop and enhance SRAM compiler architectures supporting multiple memory configurations, banking schemes, and redundancy options.
- Design and optimize memory peripheral circuits such as sense amplifiers, write drivers, decoders, word-line drivers, pre-charge circuits, Read/write assist circuits, redundancy, and repair logic.
- Optimize memory designs for Area, Performance, Leakage power, Dynamic power, yield, and manufacturability.
- Analyze low-voltage failure mechanisms including read disturb, write failure, read/write margins, retention failures, and process variation effects.
- Develop automation scripts using Python, Tcl, or Perl to improve compiler generation, characterization efficiency, regression, and design productivity.
What you'll need
- Bachelor’s, Master’s, or PhD in Electrical Engineering, Electronics, or related discipline.
- Strong understanding of SRAM architecture, compiler design, and custom memory circuit design.
- Proven experience developing embedded SRAM or Register File IP for advanced 12nm FINFET technologies and below.
- Hands-on experience with SRAM compiler development and configurable memory generation.
- Strong expertise in custom memory characterization and production-quality Liberty (.lib) generation.
- Deep knowledge of bit-cell operation, sense amplifier design, read/write assist techniques, low-voltage SRAM operation, process variation analysis, timing, and power characterization.
- Experience with Cadence Virtuoso, Spectre, HSPICE or equivalent SPICE simulators, Cadence Liberate MX and Monte Carlo simulations.
- Familiarity with memory compiler architecture and IP delivery flows.
- Experience supporting silicon bring-up, characterization, debug, and production qualification.
- Strong scripting skills in Python, Tcl, Perl, or equivalent programming languages.
Skills: SRAM, Register File, memory compiler, sense amplifiers, low-voltage SRAM
This role has been open 74 days — slightly above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Ambiq Micro | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 287 |
| Median days open | 40 d | 69 d (−29 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: SRAM, Register File, memory compiler, sense amplifiers, low-voltage SRAM
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.