Lead Verification Engineer
$160,000 - $200,000 USD yearly
Verify firmware and microcontroller subsystems for SoC and system connectivity products integrating PCIe, Ethernet, and CXL technologies.
Originally posted 3 November 2026 by the employer.
About the role
As a Technical Lead on Verification at Astera Labs, you will be responsible for verifying the firmware and microcontroller subsystems for Astera Labs’ SoC and system products using both white-box and black-box testing methodologies. This role focuses on validating firmware for high-speed interfaces in data center, server, and networking applications.
What you'll do
- Develop and execute test plans for firmware verification using white-box testing methodologies at the component level for interfaces including PCIe, UART, and SPI.
- Review code, identify bugs, and test firmware levels covering PHY, PCIe, and security features.
- Collaborate with the development team to verify hardware-software (HW-SW) interfaces on complex SoCs.
- Create automated test scripts using Python and manage test environments for verification efficiency and accuracy.
- Partner with system-level validation and QA teams to support comprehensive testing across the product lifecycle.
What you'll need
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
- 10+ years of experience in firmware verification or development for SoC/silicon products.
- Proficiency in C and Python programming with experience developing component-level test cases for firmware verification.
- Strong understanding of white-box testing methodologies with experience testing lower-level firmware components.
- Hands-on experience with server, storage, or networking equipment such as PCIe/Ethernet switches.
- Familiarity with high-speed interfaces and IP blocks including PCIe Controllers, DDR Controllers, NVMe, AMBA/AHB interfaces, and on-chip memory.
- Experience with software/firmware build environments (gcc/Make, GitHub) and Python test automation.
Nice to have
- Master's degree in Electrical Engineering, Computer Engineering, or Computer Science.
- Experience developing or testing embedded firmware for high-speed interface products such as PCIe and Ethernet.
- Familiarity with industry standards including NIST, Open Compute Project, and DMTF.
- Knowledge of secure software, including cryptography, authentication, and common software vulnerabilities.
Skills: firmware verification, white-box testing, PCIe, Python, SoC
More semiconductor jobs: Astera Labs jobs · Verification engineer jobs · San Jose jobs
This role has been open 0 days — well below the 59-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1278
|
Median days open
59 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Astera Labs | All employers we track in this specialty (1278 roles · 96 employers) |
|---|---|---|
| Open roles in this specialty | 18 | 1278 |
| Open roles in the wider Digital Design & Verification family | 64 | 3428 · 114 employers |
| Median days open | 61 d | 59 d (+2 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: firmware verification, white-box testing, PCIe, Python, SoC
Who's hiring in this category
- Qualcomm · 114 open roles · median 47 d
- NVIDIA · 97 open roles · median 75 d
- AMD · 85 open roles · median 61 d
- Apple · 75 open roles · median 13 d
- Synopsys · 73 open roles · median 48 d
- SiFive · 60 open roles · median 61 d
How we counted: 1278 open Design Verification (Design Verification) roles from 96 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.