IP Development Manager (Standard Cells) - Brno, South Moravia, Czech Republic
Originally posted 19 August 2026 by the employer.
About the role
This role involves leading an IP development team focused on standard cell libraries for future generations of integrated circuits.
What you'll do
- Lead, mentor, and develop a team of engineers focused on standard cell library development.
- Define priorities, allocate resources, and coordinate team activities across multiple projects.
- Ensure high-quality and timely delivery of standard cell libraries and related deliverables.
- Provide leadership in circuit design, layout, characterization, modeling, verification, and design automation.
- Drive continuous improvement of development methodologies, workflows, and engineering practices.
- Support and promote automation through scripting and tool development.
What you'll need
- Bachelor's, Master's, or PhD degree in Electrical Engineering, Microelectronics, or a related field.
- Strong experience in integrated circuit design, preferably in standard cell, library, digital IP, or related development.
- Solid understanding of CMOS circuit design principles and semiconductor technologies.
- Experience leading technical projects, mentoring engineers, or managing teams.
- Strong organizational skills with the ability to prioritize work and balance quality, schedule, and business needs.
- Fluent English, both written and spoken.
Nice to have
- Experience with EDA tools used in standard cell development.
- Experience working in a distributed or global engineering organization.
Skills: standard cell libraries, integrated circuit design, CMOS circuit design, layout, characterization
This role has been open 68 days — slightly above the 66-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1081
|
Median days open
66 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | onsemi | All employers we track in this specialty (1081 roles · 104 employers) |
|---|---|---|
| Open roles in this specialty | 31 | 1081 |
| Open roles in the wider Digital Design & Verification family | 59 | 3328 · 116 employers |
| Median days open | 99 d | 66 d (+33 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: standard cell libraries, integrated circuit design, CMOS circuit design, layout, characterization
Who's hiring in this category
- Qualcomm · 158 open roles · median 63 d
- Synopsys · 86 open roles · median 40 d
- AMD · 77 open roles · median 45 d
- Analog Devices · 49 open roles · median 56 d
- NXP Semiconductors · 44 open roles · median 100 d
- NVIDIA · 37 open roles · median 52 d
How we counted: 1081 open Digital/RTL Design (RTL Design) roles from 104 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.