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onsemi

IP Development Manager (Standard Cells) - Brno, South Moravia, Czech Republic

onsemi Brno, South Moravia, Czech Republic 7 days ago
Digital Design & SoC Architecture

Originally posted 19 August 2026 by the employer.

About the role

This role involves leading an IP development team focused on standard cell libraries for future generations of integrated circuits.

What you'll do

  • Lead, mentor, and develop a team of engineers focused on standard cell library development.
  • Define priorities, allocate resources, and coordinate team activities across multiple projects.
  • Ensure high-quality and timely delivery of standard cell libraries and related deliverables.
  • Provide leadership in circuit design, layout, characterization, modeling, verification, and design automation.
  • Drive continuous improvement of development methodologies, workflows, and engineering practices.
  • Support and promote automation through scripting and tool development.

What you'll need

  • Bachelor's, Master's, or PhD degree in Electrical Engineering, Microelectronics, or a related field.
  • Strong experience in integrated circuit design, preferably in standard cell, library, digital IP, or related development.
  • Solid understanding of CMOS circuit design principles and semiconductor technologies.
  • Experience leading technical projects, mentoring engineers, or managing teams.
  • Strong organizational skills with the ability to prioritize work and balance quality, schedule, and business needs.
  • Fluent English, both written and spoken.

Nice to have

  • Experience with EDA tools used in standard cell development.
  • Experience working in a distributed or global engineering organization.

Skills: standard cell libraries, integrated circuit design, CMOS circuit design, layout, characterization

Market context

This role has been open 39 days — well below the 63-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
964
Median days open
63 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How onsemi compares in Digital/RTL Design hiring
Metric onsemi All employers we track in this specialty (964 roles · 101 employers)
Open roles in this specialty 32 964
Open roles in the wider Digital Design & Verification family 56 3080 · 114 employers
Median days open 102 d 63 d (+39 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: standard cell libraries, integrated circuit design, CMOS circuit design, layout, characterization

Who's hiring in this category

  • Qualcomm · 139 open roles · median 61 d
  • AMD · 67 open roles · median 63 d
  • Synopsys · 63 open roles · median 23 d
  • NXP Semiconductors · 54 open roles · median 71 d
  • Analog Devices · 46 open roles · median 36 d
  • NVIDIA · 46 open roles · median 52 d

How we counted: 964 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 28 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Brno, South Moravia, Czech Republic
On-site
7 days ago

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