Io And Memory Sub Sytem Architecture - United States
$180,000 - $334,200 USD yearly
About the role
This role involves leading the architecture, design, and development of memory subsystem solutions for server and high-performance computing applications, specifically focusing on DDR6, LPDDR6, and HBM solutions.
What you'll do
- Drive technical decisions for memory interfaces, PHY architecture, signal & power integrity, and system integration.
- Define subsystem requirements and translate system-level needs into architecture and design specifications.
- Develop expertise-driven solutions involving DDR4/5/6, LPDDR4/5/6, HBM3/4/5 DRAM, RCD, DB, DIMMs, and Server Platforms.
- Analyze memory subsystem performance, timing, power, and interoperability requirements.
- Contribute to digital design, architecture reviews, and RTL implementation strategies.
- Develop and maintain architecture specifications, design requirements, and technical documentation.
What you'll need
- Master’s Degree (M.S.) in Electrical Engineering, Computer Engineering, or a related technical discipline.
- 12+ years of industry experience in semiconductor, ASIC, memory, or high-speed interface development.
- Demonstrated experience leading complex technical projects and influencing architectural decisions.
- System Architecture Leadership.
- DDR5/DDR6/LPDDR5/HBM Memory Expertise.
- High-Speed PHY Design.
- Tx/Rx Circuit Architecture.
- DFE/CTLE Equalization Techniques.
- I2C, I3C, USB Interfaces.
- Digital Design & Verification.
- Technical Specification Development.
Nice to have
- Analytical Problem Solving.
- Executive-Level Presentations.
Skills: DDR4/5/6, LPDDR4/5/6, HBM3/4/5, PHY architecture, signal integrity, digital design
This role has been open 50 days — well below the 66-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
291
|
Median days open
66 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Rambus | All employers we track in this specialty (291 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 291 |
| Median days open | 50 d | 66 d (−16 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: DDR4/5/6, LPDDR4/5/6, HBM3/4/5, PHY architecture, signal integrity, digital design
Who's hiring in this category
- Micron Technology · 152 open roles · median 82 d
- Synopsys · 27 open roles · median 46 d
- Broadcom · 17 open roles · median 50 d
- SanDisk · 17 open roles · median 29 d
- Qualcomm · 13 open roles · median 172 d
- NVIDIA · 7 open roles · median 56 d
How we counted: 291 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 2 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.